cy7c1361.vhd

vhdl cod for ram.For sp3e

            END IF;
            IF MemDataB(RAddr) = -2 THEN
                OBuf1(17 downto 9) := (others => 'U');
            ELSIF MemDataB(RAddr) = -1 THEN
                OBuf1(17 downto 9) := (others => 'X');
            ELSE
                OBuf1(17 downto 9) := to_slv(MemDataB(RAddr),9);
            END IF;
            IF MemDataC(RAddr) = -2 THEN
                OBuf1(26 downto 18) := (others => 'U');
            ELSIF MemDataC(RAddr) = -1 THEN
                OBuf1(26 downto 18) := (others => 'X');
            ELSE
                OBuf1(26 downto 18) := to_slv(MemDataC(RAddr),9);
            END IF;
            IF MemDataD(RAddr) = -2 THEN
                OBuf1(35 downto 27) := (others => 'U');
            ELSIF MemDataD(RAddr) = -1 THEN
                OBuf1(35 downto 27) := (others => 'X');
            ELSE
                OBuf1(35 downto 27) := to_slv(MemDataD(RAddr),9);
            END IF;
        END PROCEDURE ReadMem;

        PROCEDURE WriteMem
            (WAddr     : IN natural;
             WDatA     : IN std_logic_vector(8 downto 0);
             WDatB     : IN std_logic_vector(8 downto 0);
             WDatC     : IN std_logic_vector(8 downto 0);
             WDatD     : IN std_logic_vector(8 downto 0);
             WGWN      : IN std_logic;
             WBWA      : IN std_logic;
             WBWB      : IN std_logic;
             WBWC      : IN std_logic;
             WBWD      : IN std_logic)
        IS
        BEGIN
            IF WGWN = '0' THEN
                MemDataA(WAddr) := -1;
                MemDataB(WAddr) := -1;
                MemDataC(WAddr) := -1;
                MemDataD(WAddr) := -1;
                IF Violation /= 'X' THEN
                    MemDataA(WAddr) := to_nat(WDatA);
                    MemDataB(WAddr) := to_nat(WDatB);
                    MemDataC(WAddr) := to_nat(WDatC);
                    MemDataD(WAddr) := to_nat(WDatD);
                END IF;
            ELSE
                IF (WBWA = '0') THEN
                    MemDataA(WAddr) := -1;
                    IF Violation /= 'X' THEN
                        MemDataA(WAddr) := to_nat(WDatA);
                    END IF;
                END IF;
                IF (WBWB = '0') THEN
                    MemDataB(WAddr) := -1;
                    IF Violation /= 'X' THEN
                        MemDataB(WAddr) := to_nat(WDatB);
                    END IF;
                END IF;
                IF (WBWC = '0') THEN
                    MemDataC(WAddr) := -1;
                    IF Violation /= 'X' THEN
                        MemDataC(WAddr) := to_nat(WDatC);
                    END IF;
                END IF;
                IF (WBWD = '0') THEN
                    MemDataD(WAddr) := -1;
                    IF Violation /= 'X' THEN
                        MemDataD(WAddr) := to_nat(WDatD);
                    END IF;
                END IF;
            END IF;
        END PROCEDURE WriteMem;

    BEGIN

        Burst_Setup : PROCESS (MODEIn)

        BEGIN

           IF (MODEIn = '0') THEN
               Burst_Seq <= ln;  -- linear burst
           ELSE
               Burst_Seq <= il;  -- interleaved burst
           END IF;

        END PROCESS Burst_Setup;

    ----------------------------------------------------------------------------
    -- Main Behavior Process
    ----------------------------------------------------------------------------
        Behavior : PROCESS (BWANIn, BWBNIn, BWCNIn, BWDNIn, DatAIn, DatBIn,
                            DatCIn, DatDIN, CLKIn, AddressIn, GWNIn, BWENIn,
                            OENegIn, ADVNIn, ADSPNIn, ADSCNIn, CE2In, CENegIn,
                            CE2NegIn, ZZIn)

            -- Type definition for commands
            TYPE command_type is (ds,
                                  SPwr_burst,
                                  SPwr_susp,
                                  SCwr,
                                  begin_rw,
                                  read_burst,
                                  read_susp
                                 );

            -- Timing Check Variables

            VARIABLE Tviol_AddressIn_CLK : X01 := '0';
            VARIABLE TD_AddressIn_CLK    : VitalTimingDataType;

            VARIABLE Tviol_DatDIn_CLK    : X01 := '0';
            VARIABLE TD_DatDIn_CLK       : VitalTimingDataType;

            VARIABLE Tviol_DatCIn_CLK    : X01 := '0';
            VARIABLE TD_DatCIn_CLK       : VitalTimingDataType;

            VARIABLE Tviol_DatBIn_CLK    : X01 := '0';
            VARIABLE TD_DatBIn_CLK       : VitalTimingDataType;

            VARIABLE Tviol_DatAIn_CLK    : X01 := '0';
            VARIABLE TD_DatAIn_CLK       : VitalTimingDataType;

            VARIABLE Tviol_BWDN_CLK      : X01 := '0';
            VARIABLE TD_BWDN_CLK         : VitalTimingDataType;

            VARIABLE Tviol_BWCN_CLK      : X01 := '0';
            VARIABLE TD_BWCN_CLK         : VitalTimingDataType;

            VARIABLE Tviol_BWBN_CLK      : X01 := '0';
            VARIABLE TD_BWBN_CLK         : VitalTimingDataType;

            VARIABLE Tviol_BWAN_CLK      : X01 := '0';
            VARIABLE TD_BWAN_CLK         : VitalTimingDataType;

            VARIABLE Tviol_BWEN_CLK      : X01 := '0';
            VARIABLE TD_BWEN_CLK         : VitalTimingDataType;

            VARIABLE Tviol_GWN_CLK       : X01 := '0';
            VARIABLE TD_GWN_CLK          : VitalTimingDataType;

            VARIABLE Tviol_ADVNIn_CLK    : X01 := '0';
            VARIABLE TD_ADVNIn_CLK       : VitalTimingDataType;

            VARIABLE Tviol_ADSCNIn_CLK   : X01 := '0';
            VARIABLE TD_ADSCNIn_CLK      : VitalTimingDataType;

            VARIABLE Tviol_ADSPNIn_CLK   : X01 := '0';
            VARIABLE TD_ADSPNIn_CLK      : VitalTimingDataType;

            VARIABLE Tviol_CENegIn_CLK   : X01 := '0';
            VARIABLE TD_CENegIn_CLK      : VitalTimingDataType;

            VARIABLE Tviol_CE2NegIn_CLK  : X01 := '0';
            VARIABLE TD_CE2NegIn_CLK     : VitalTimingDataType;

            VARIABLE Tviol_CE2In_CLK     : X01 := '0';
            VARIABLE TD_CE2In_CLK        : VitalTimingDataType;

            VARIABLE Pviol_CLK    : X01 := '0';
            VARIABLE PD_CLK       : VitalPeriodDataType := VitalPeriodDataInit;

            VARIABLE MemAddr    : NATURAL RANGE 0 TO MemSize;
            VARIABLE startaddr  : NATURAL RANGE 0 TO MemSize;

            VARIABLE Burst_Cnt  : NATURAL RANGE 0 TO 4 := 0;
            VARIABLE memstart   : NATURAL RANGE 0 TO 3 := 0;
            VARIABLE offset     : INTEGER RANGE -3 TO 3 := 0;

            VARIABLE command    : command_type;
            VARIABLE R          : std_logic;

            VARIABLE zz_set     : BOOLEAN := false;
            VARIABLE zz_reset   : BOOLEAN := true;
            VARIABLE zz_cnt     : INTEGER RANGE 0 TO 2 := 0;

        BEGIN

            --------------------------------------------------------------------
            -- Timing Check Section
            --------------------------------------------------------------------
            IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal      => AddressIn,
                    TestSignalName  => "Address",
                    RefSignal       => CLKIn,
                    RefSignalName   => "CLK",
                    SetupHigh       => tsetup_A0_CLK,
                    SetupLow        => tsetup_A0_CLK,
                    HoldHigh        => thold_A0_CLK,
                    HoldLow         => thold_A0_CLK,
                    CheckEnabled    => (ZZIn = '0'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_AddressIn_CLK,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_AddressIn_CLK );

                VitalSetupHoldCheck (
                    TestSignal      => DatDIn,
                    TestSignalName  => "DatD",
                    RefSignal       => CLKIn,
                    RefSignalName   => "CLK",
                    SetupHigh       => tsetup_DQA0_CLK,
                    SetupLow        => tsetup_DQA0_CLK,
                    HoldHigh        => thold_DQA0_CLK,
                    HoldLow         => thold_DQA0_CLK,
                    CheckEnabled    => (ZZIn ='0') AND
                                       (DatDIn/=D_zd(35 downto 27)),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_DatDIn_CLK,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_DatDIn_CLK );

                VitalSetupHoldCheck (
                    TestSignal      => DatCIn,
                    TestSignalName  => "DatC",
                    RefSignal       => CLKIn,
                    RefSignalName   => "CLK",
                    SetupHigh       => tsetup_DQA0_CLK,
                    SetupLow        => tsetup_DQA0_CLK,
                    HoldHigh        => thold_DQA0_CLK,
                    HoldLow         => thold_DQA0_CLK,
                    CheckEnabled    => (ZZIn ='0') AND
                                       (DatCIn/=D_zd(26 downto 18)),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_DatCIn_CLK,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_DatCIn_CLK );

                VitalSetupHoldCheck (
                    TestSignal      => DatBIn,
                    TestSignalName  => "DatB",
                    RefSignal       => CLKIn,
                    RefSignalName   => "CLK",
                    SetupHigh       => tsetup_DQA0_CLK,
                    SetupLow        => tsetup_DQA0_CLK,
                    HoldHigh        => thold_DQA0_CLK,
                    HoldLow         => thold_DQA0_CLK,
                    CheckEnabled    => (ZZIn ='0') AND
                                       (DatBIn/=D_zd(17 downto 9)),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_DatBIn_CLK,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_DatBIn_CLK );

                VitalSetupHoldCheck (
                    TestSignal      => DatAIn,
                    TestSignalName  => "DatA",
                    RefSignal       => CLKIn,
                    RefSignalName   => "CLK",
                    SetupHigh       => tsetup_DQA0_CLK,
                    SetupLow        => tsetup_DQA0_CLK,
                    HoldHigh        => thold_DQA0_CLK,
                    HoldLow         => thold_DQA0_CLK,
                    CheckEnabled    => (ZZIn ='0') AND
                                       (DatAIn/=D_zd(8 downto 0)),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_DatAIn_CLK,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_DatAIn_CLK );

                VitalSetupHoldCheck (
                    TestSignal      => GWNIn,
                    TestSignalName  => "GW",
                    RefSignal       => CLKIn,
                    RefSignalName   => "CLK",
                    SetupHigh       => tsetup_BWANeg_CLK,
                    SetupLow        => tsetup_BWANeg_CLK,
                    HoldHigh        => thold_BWANeg_CLK,
                    HoldLow         => thold_BWANeg_CLK,
                    CheckEnabled    => (ZZIn ='0'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_GWN_CLK,
                    XOn             => XOn,