📄 idt71v416.ftm

📁 vhdl cod for ram.For sp3e
💻 FTM
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<!DOCTYPE FTML SYSTEM "ftml.dtd"><FTML><HEAD><TITLE>FMF Timing for idt71v416 Parts</TITLE><BODY><REVISION.HISTORY>version: |  author:  | mod date: | changes made:  V1.0    R. Munden    06 Mar 28   Initial release</REVISION.HISTORY><TIMESCALE>1ns</TIMESCALE><MODEL>idt71v416<FMFTIME>IDT71V416S10BE<SOURCE>Integrated Device Technology DSC-6442/01 July 2004</SOURCE>IDT71V416S10PH<SOURCE>Integrated Device Technology DSC-6442/01 July 2004</SOURCE>IDT71V416S10Y<SOURCE>Integrated Device Technology DSC-6442/01 July 2004</SOURCE><COMMENT>Values are for VCC=3.0V to 3.6V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Values not provided were derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH BLENeg D0 () () (1.5:3.0:5.0) (0.0:3.5:5.0) (1.5:3.0:5.0) (0.0.:3.5:5.0))    (IOPATH OENeg D0 () () (1.5:3.0:5.0) (0.0:3.5:5.0) (1.5:3.0:5.0) (0.0.:3.5:5.0))    (IOPATH CENeg D0 () () (1.5:3.0:5.0) (4.0:8.0:10.0) (1.5:3.0:5.0) (4.0:8.0:10.0))    (IOPATH A0 D0 (4.0:8.0:10.0) (4.0:8.0:10.0))  ))  (TIMINGCHECK    (SETUP BLENeg WENeg (8))    (SETUP D0 WENeg (5))    (SETUP D0 CENeg (5))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (8))  )</TIMING></FMFTIME><FMFTIME>IDT71V416S12BE<SOURCE>Integrated Device Technology DSC-6442/01 July 2004</SOURCE>IDT71V416S12PH<SOURCE>Integrated Device Technology DSC-6442/01 July 2004</SOURCE>IDT71V416S12Y<SOURCE>Integrated Device Technology DSC-6442/01 July 2004</SOURCE><COMMENT>Values are for VCC=3.0V to 3.6V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Values not provided were derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH BLENeg D0 () () (1.5:3.0:6.0) (0.0:4.0:6.0) (1.5:3.0:6.0) (0.0:4.0:6.0))    (IOPATH OENeg D0 () () (1.5:3.0:6.0) (0.0:4.0:6.0) (1.5:3.0:6.0) (0.0:4.0:6.0))    (IOPATH CENeg D0 () () (1.5:3.0:6.0) (5.0:10.0:12.0) (1.5:3.0:6.0) (5.0:10.0:12.0))    (IOPATH A0 D0 (4.0:8.0:12.0) (4.0:8.0:12.0))  ))  (TIMINGCHECK    (SETUP BLENeg WENeg (8))    (SETUP D0 WENeg (6))    (SETUP D0 CENeg (6))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (8))  )</TIMING></FMFTIME><FMFTIME>IDT71V416S15BE<SOURCE>Integrated Device Technology DSC-6442/01 July 2004</SOURCE>IDT71V416S15PH<SOURCE>Integrated Device Technology DSC-6442/01 July 2004</SOURCE>IDT71V416S15Y<SOURCE>Integrated Device Technology DSC-6442/01 July 2004</SOURCE><COMMENT>Values are for VCC=3.0V to 3.6V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Values not provided were derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH BLENeg D0 () () (2:4:7) (0:5:7) (2:4:7) (0:5:7))    (IOPATH OENeg D0 () () (2:4:7) (0:5:7) (2:4:7) (0:5:7))    (IOPATH CENeg D0 () () (2:4:7) (5:10:15) (2:4:7) (5:10:15))    (IOPATH A0 D0 (4:10:15) (4:10:15))  ))  (TIMINGCHECK    (SETUP BLENeg WENeg (10))    (SETUP D0 WENeg (7))    (SETUP D0 CENeg (7))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (10))  )</TIMING></FMFTIME></BODY></FTML>
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