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📄 edj1316ba.vhd

📁 vhdl cod for ram.For sp3e
💻 VHD
📖 第 1 页 / 共 5 页
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                                                                    UnitDelay));    TRASMIN2 : VitalBuf(tRASMIN_out(2), tRASMIN_in(2), (tdevice_tRASMIN - 1 ns,                                                                    UnitDelay));    TRASMIN3 : VitalBuf(tRASMIN_out(3), tRASMIN_in(3), (tdevice_tRASMIN - 1 ns,                                                                    UnitDelay));    TRASMIN4 : VitalBuf(tRASMIN_out(4), tRASMIN_in(4), (tdevice_tRASMIN - 1 ns,                                                                    UnitDelay));    TRASMIN5 : VitalBuf(tRASMIN_out(5), tRASMIN_in(5), (tdevice_tRASMIN - 1 ns,                                                                    UnitDelay));    TRASMIN6 : VitalBuf(tRASMIN_out(6), tRASMIN_in(6), (tdevice_tRASMIN - 1 ns,                                                                    UnitDelay));    TRASMIN7 : VitalBuf(tRASMIN_out(7), tRASMIN_in(7), (tdevice_tRASMIN - 1 ns,                                                                    UnitDelay));    TRASMAX  : VitalBuf(tRASMAX_out(0), tRASMAX_in(0), (tdevice_tRASMAX - 1 ns,                                                                    UnitDelay));    TRASMAX1 : VitalBuf(tRASMAX_out(1), tRASMAX_in(1), (tdevice_tRASMAX - 1 ns,                                                                    UnitDelay));    TRASMAX2 : VitalBuf(tRASMAX_out(2), tRASMAX_in(2), (tdevice_tRASMAX - 1 ns,                                                                    UnitDelay));    TRASMAX3 : VitalBuf(tRASMAX_out(3), tRASMAX_in(3), (tdevice_tRASMAX - 1 ns,                                                                    UnitDelay));    TRASMAX4 : VitalBuf(tRASMAX_out(4), tRASMAX_in(4), (tdevice_tRASMAX - 1 ns,                                                                    UnitDelay));    TRASMAX5 : VitalBuf(tRASMAX_out(5), tRASMAX_in(5), (tdevice_tRASMAX - 1 ns,                                                                    UnitDelay));    TRASMAX6 : VitalBuf(tRASMAX_out(6), tRASMAX_in(6), (tdevice_tRASMAX - 1 ns,                                                                    UnitDelay));    TRASMAX7 : VitalBuf(tRASMAX_out(7), tRASMAX_in(7), (tdevice_tRASMAX - 1 ns,                                                                    UnitDelay));    TRTP     : VitalBuf(tRTP_out(0), tRTP_in(0), (tdevice_tRTP - 1 ns,                                                                    UnitDelay));    TRTP1    : VitalBuf(tRTP_out(1), tRTP_in(1), (tdevice_tRTP - 1 ns,                                                                    UnitDelay));    TRTP2    : VitalBuf(tRTP_out(2), tRTP_in(2), (tdevice_tRTP - 1 ns,                                                                    UnitDelay));    TRTP3    : VitalBuf(tRTP_out(3), tRTP_in(3), (tdevice_tRTP - 1 ns,                                                                    UnitDelay));    TRTP4    : VitalBuf(tRTP_out(4), tRTP_in(4), (tdevice_tRTP - 1 ns,                                                                    UnitDelay));    TRTP5    : VitalBuf(tRTP_out(5), tRTP_in(5), (tdevice_tRTP - 1 ns,                                                                    UnitDelay));    TRTP6    : VitalBuf(tRTP_out(6), tRTP_in(6), (tdevice_tRTP - 1 ns,                                                                    UnitDelay));    TRTP7    : VitalBuf(tRTP_out(7), tRTP_in(7), (tdevice_tRTP - 1 ns,                                                                    UnitDelay));    TWR      : VitalBuf(tWR_out(0), tWR_in(0), (tdevice_tWR - 1 ns,                                                                    UnitDelay));    TWR1     : VitalBuf(tWR_out(1), tWR_in(1), (tdevice_tWR - 1 ns,                                                                    UnitDelay));    TWR2     : VitalBuf(tWR_out(2), tWR_in(2), (tdevice_tWR - 1 ns,                                                                    UnitDelay));    TWR3     : VitalBuf(tWR_out(3), tWR_in(3), (tdevice_tWR - 1 ns,                                                                    UnitDelay));    TWR4     : VitalBuf(tWR_out(4), tWR_in(4), (tdevice_tWR - 1 ns,                                                                    UnitDelay));    TWR5     : VitalBuf(tWR_out(5), tWR_in(5), (tdevice_tWR - 1 ns,                                                                    UnitDelay));    TWR6     : VitalBuf(tWR_out(6), tWR_in(6), (tdevice_tWR - 1 ns,                                                                    UnitDelay));    TWR7     : VitalBuf(tWR_out(7), tWR_in(7), (tdevice_tWR - 1 ns,                                                                    UnitDelay));    TWTR     : VitalBuf(tWTR_out(0), tWTR_in(0), (tdevice_tWTR - 1 ns,                                                                    UnitDelay));    TWTR1    : VitalBuf(tWTR_out(1), tWTR_in(1), (tdevice_tWTR - 1 ns,                                                                    UnitDelay));    TWTR2    : VitalBuf(tWTR_out(2), tWTR_in(2), (tdevice_tWTR - 1 ns,                                                                    UnitDelay));    TWTR3    : VitalBuf(tWTR_out(3), tWTR_in(3), (tdevice_tWTR - 1 ns,                                                                    UnitDelay));    TWTR4    : VitalBuf(tWTR_out(4), tWTR_in(4), (tdevice_tWTR - 1 ns,                                                                    UnitDelay));    TWTR5    : VitalBuf(tWTR_out(5), tWTR_in(5), (tdevice_tWTR - 1 ns,                                                                    UnitDelay));    TWTR6    : VitalBuf(tWTR_out(6), tWTR_in(6), (tdevice_tWTR - 1 ns,                                                                    UnitDelay));    TWTR7    : VitalBuf(tWTR_out(7), tWTR_in(7), (tdevice_tWTR - 1 ns,                                                                    UnitDelay));    TRP      : VitalBuf(tRP_out(0), tRP_in(0), (tdevice_tRP - 1 ns,                                                                    UnitDelay));    TRP1     : VitalBuf(tRP_out(1), tRP_in(1), (tdevice_tRP - 1 ns,                                                                    UnitDelay));    TRP2     : VitalBuf(tRP_out(2), tRP_in(2), (tdevice_tRP - 1 ns,                                                                    UnitDelay));    TRP3     : VitalBuf(tRP_out(3), tRP_in(3), (tdevice_tRP - 1 ns,                                                                    UnitDelay));    TRP4     : VitalBuf(tRP_out(4), tRP_in(4), (tdevice_tRP - 1 ns,                                                                    UnitDelay));    TRP5     : VitalBuf(tRP_out(5), tRP_in(5), (tdevice_tRP - 1 ns,                                                                    UnitDelay));    TRP6     : VitalBuf(tRP_out(6), tRP_in(6), (tdevice_tRP - 1 ns,                                                                    UnitDelay));    TRP7     : VitalBuf(tRP_out(7), tRP_in(7), (tdevice_tRP - 1 ns,                                                                    UnitDelay));    TCKESR      : VitalBuf(tCKESR_out(0), tCKESR_in(0), (tdevice_tCKESR - 1 ns,                                                                    UnitDelay));    TCKESR1     : VitalBuf(tCKESR_out(1), tCKESR_in(1), (tdevice_tCKESR - 1 ns,                                                                    UnitDelay));    TCKESR2     : VitalBuf(tCKESR_out(2), tCKESR_in(2), (tdevice_tCKESR - 1 ns,                                                                    UnitDelay));    TCKESR3     : VitalBuf(tCKESR_out(3), tCKESR_in(3), (tdevice_tCKESR - 1 ns,                                                                    UnitDelay));    TCKESR4     : VitalBuf(tCKESR_out(4), tCKESR_in(4), (tdevice_tCKESR - 1 ns,                                                                    UnitDelay));    TCKESR5     : VitalBuf(tCKESR_out(5), tCKESR_in(5), (tdevice_tCKESR - 1 ns,                                                                    UnitDelay));    TCKESR6     : VitalBuf(tCKESR_out(6), tCKESR_in(6), (tdevice_tCKESR - 1 ns,                                                                    UnitDelay));    TCKESR7     : VitalBuf(tCKESR_out(7), tCKESR_in(7), (tdevice_tCKESR - 1 ns,                                                                    UnitDelay));    TRFCMIN  : VitalBuf(tRFCMIN_out, tRFCMIN_in, (tdevice_tRFCMIN - 1 ns,                                                                    UnitDelay));    TXS    : VitalBuf(tXS_out,   tXS_in,   (tdevice_tRFCMIN + 9 ns,                                                                    UnitDelay));    TREFPER   : VitalBuf(tREFPer_out,  tREFPer_in,  (tdevice_tREFPer - 1 ns,                                                                    UnitDelay));    TCKAVGMAX: VitalBuf(tCKAVGMAX_out, tCKAVGMAX_in, (tdevice_tCKAVGMAX - 1 ns,                                                                    UnitDelay));    TMRD: VitalBuf(tMRD_out, tMRD_in, (tdevice_tMRD - 1 ns,                                                                    UnitDelay));    TMOD: VitalBuf(tMOD_out, tMOD_in, (tdevice_tMOD - 1 ns,                                                                    UnitDelay));    TXPR: VitalBuf(tXPR_out, tXPR_in, (tdevice_tXPR - 1 ns,                                                                    UnitDelay));    TZQINIT: VitalBuf(tZQINIT_out, tZQINIT_in, (tdevice_tZQINIT - 1 ns,                                                                    UnitDelay));    TZQOPER: VitalBuf(tZQOPER_out, tZQOPER_in, (tdevice_tZQOPER - 1 ns,                                                                    UnitDelay));    TZQCS: VitalBuf(tZQCS_out, tZQCS_in, (tdevice_tZQCS - 1 ns,                                                                    UnitDelay));    TCKSRX   : VitalBuf(tCKSRX_out, tCKSRX_in, (tdevice_tCKSRX - 1 ns,                                                                    UnitDelay));    TCKSRE   : VitalBuf(tCKSRE_out, tCKSRE_in, (tdevice_tCKSRE - 1 ns,                                                                    UnitDelay));    TWLODTEN : VitalBuf(tWLODTEN_out, tWLODTEN_in, (tdevice_tMOD -1 ns,                                                                    UnitDelay));    TWLDQSEN : VitalBuf(tWLDQSEN_out,  tWLDQSEN_in,(tdevice_tWLDQSEN - 1 ns,                                                                    UnitDelay));    TWLMRD   : VitalBuf(tWLMRD_out, tWLMRD_in, (tdevice_tWLMRD - 1 ns,                                                                    UnitDelay));    TWLOMAX  : VitalBuf(tWLOMAX_out, tWLOMAX_in, (tdevice_tWLOMAX - 1 ns,                                                                    UnitDelay));    TWLOEMAX : VitalBuf(tWLOEMAX_out, tWLOEMAX_in, (tdevice_tWLOEMAX - 1 ns,                                                                    UnitDelay));    ----------------------------------------------------------------------------    -- Wire Delays    ----------------------------------------------------------------------------    WireDelay : BLOCK    BEGIN        w_01 : VitalWireDelay (ODT_ipd, ODT, tipd_ODT);        w_02 : VitalWireDelay (CK_ipd, CK, tipd_CK);        w_03 : VitalWireDelay (CKNeg_ipd, CKNeg, tipd_CKNeg);        w_04 : VitalWireDelay (CKE_ipd, CKE, tipd_CKE);        w_05 : VitalWireDelay (CSNeg_ipd, CSNeg, tipd_CSNeg);        w_06 : VitalWireDelay (RASNeg_ipd, RASNeg, tipd_RASNeg);        w_07 : VitalWireDelay (CASNeg_ipd, CASNeg, tipd_CASNeg);        w_08 : VitalWireDelay (WENeg_ipd, WENeg, tipd_WENeg);        w_09 : VitalWireDelay (BA0_ipd, BA0, tipd_BA0);        w_10 : VitalWireDelay (BA1_ipd, BA1, tipd_BA1);        w_11 : VitalWireDelay (BA2_ipd, BA2, tipd_BA2);        w_12 : VitalWireDelay (A0_ipd, A0, tipd_A0);        w_13 : VitalWireDelay (A1_ipd, A1, tipd_A1);        w_14 : VitalWireDelay (A2_ipd, A2, tipd_A2);        w_15 : VitalWireDelay (A3_ipd, A3, tipd_A3);        w_16 : VitalWireDelay (A4_ipd, A4, tipd_A4);        w_17 : VitalWireDelay (A5_ipd, A5, tipd_A5);        w_18 : VitalWireDelay (A6_ipd, A6, tipd_A6);        w_19 : VitalWireDelay (A7_ipd, A7, tipd_A7);        w_20 : VitalWireDelay (A8_ipd, A8, tipd_A8);        w_21 : VitalWireDelay (A9_ipd, A9, tipd_A9);        w_22 : VitalWireDelay (A10_ipd, A10, tipd_A10);        w_23 : VitalWireDelay (A11_ipd, A11, tipd_A11);        w_24 : VitalWireDelay (A12_ipd, A12, tipd_A12);        w_25 : VitalWireDelay (A13_ipd, A13, tipd_A13);        w_26 : VitalWireDelay (LDQ0_ipd, LDQ0, tipd_LDQ0);        w_27 : VitalWireDelay (LDQ1_ipd, LDQ1, tipd_LDQ1);        w_28 : VitalWireDelay (LDQ2_ipd, LDQ2, tipd_LDQ2);        w_29 : VitalWireDelay (LDQ3_ipd, LDQ3, tipd_LDQ3);        w_30 : VitalWireDelay (LDQ4_ipd, LDQ4, tipd_LDQ4);        w_31 : VitalWireDelay (LDQ5_ipd, LDQ5, tipd_LDQ5);        w_32 : VitalWireDelay (LDQ6_ipd, LDQ6, tipd_LDQ6);        w_33 : VitalWireDelay (LDQ7_ipd, LDQ7, tipd_LDQ7);        w_34 : VitalWireDelay (UDQ0_ipd, UDQ0, tipd_UDQ0);        w_35 : VitalWireDelay (UDQ1_ipd, UDQ1, tipd_UDQ1);        w_36 : VitalWireDelay (UDQ2_ipd, UDQ2, tipd_UDQ2);        w_37 : VitalWireDelay (UDQ3_ipd, UDQ3, tipd_UDQ3);        w_38 : VitalWireDelay (UDQ4_ipd, UDQ4, tipd_UDQ4);        w_39 : VitalWireDelay (UDQ5_ipd, UDQ5, tipd_UDQ5);        w_40 : VitalWireDelay (UDQ6_ipd, UDQ6, tipd_UDQ6);        w_41 : VitalWireDelay (UDQ7_ipd, UDQ7, tipd_UDQ7);        w_42 : VitalWireDelay (LDQS_ipd, LDQS, tipd_LDQS);        w_43 : VitalWireDelay (LDQSNeg_ipd, LDQSNeg, tipd_LDQSNeg);        w_44 : VitalWireDelay (UDQS_ipd, UDQS, tipd_UDQS);        w_45 : VitalWireDelay (UDQSNeg_ipd, UDQSNeg, tipd_UDQSNeg);        w_46 : VitalWireDelay (RESETNeg_ipd, RESETNeg, tipd_RESETNeg);        w_47 : VitalWireDelay (LDM_ipd, LDM, tipd_LDM);        w_48: VitalWireDelay (UDM_ipd, UDM, tipd_UDM);    END BLOCK;    ODT_nwv        <= To_UX01(ODT_ipd);    CK_nwv         <= To_UX01(CK_ipd);    CKNeg_nwv      <= To_UX01(CKNeg_ipd);    CKE_nwv        <= To_UX01(CKE_ipd);    CSNeg_nwv      <= To_UX01(CSNeg_ipd);    RASNeg_nwv     <= To_UX01(RASNeg_ipd);    CASNeg_nwv     <= To_UX01(CASNeg_ipd);    WENeg_nwv      <= To_UX01(WENeg_ipd);    LDM_nwv        <= To_UX01(LDM_ipd);    UDM_nwv        <= To_UX01(UDM_ipd);    BA0_nwv        <= To_UX01(BA0_ipd);    BA1_nwv        <= To_UX01(BA1_ipd);    BA2_nwv        <= To_UX01(BA2_ipd);    A0_nwv         <= To_UX01(A0_ipd);    A1_nwv         <= To_UX01(A1_ipd);    A2_nwv         <= To_UX01(A2_ipd);    A3_nwv         <= To_UX01(A3_ipd);    A4_nwv         <= To_UX01(A4_ipd);    A5_nwv         <= To_UX01(A5_ipd);    A6_nwv         <= To_UX01(A6_ipd);    A7_nwv         <= To_UX01(A7_ipd);    A8_nwv         <= To_UX01(A8_ipd);    A9_nwv         <= To_UX01(A9_ipd);    A10_nwv        <= To_UX01(A10_ipd);    A11_nwv        <= To_UX01(A11_ipd);    A12_nwv        <= To_UX01(A12_ipd);    A13_nwv        <= To_UX01(A13_ipd);    LDQ0_nwv       <= To_UX01(LDQ0_ipd);    LDQ1_nwv       <= To_UX01(LDQ1_ipd);    LDQ2_nwv       <= To_UX01(LDQ2_ipd);    LDQ3_nwv       <= To_UX01(LDQ3_ipd);    LDQ4_nwv       <= To_UX01(LDQ4_ipd);    LDQ5_nwv       <= To_UX01(LDQ5_ipd);    LDQ6_nwv       <= To_UX01(LDQ6_ipd);    LDQ7_nwv       <= To_UX01(LDQ7_ipd);    UDQ0_nwv       <= To_UX01(UDQ0_ipd);    UDQ1_nwv       <= To_UX01(UDQ1_ipd);    UDQ2_nwv       <= To_UX01(UDQ2_ipd);    UDQ3_nwv       <= To_UX01(UDQ3_ipd);    UDQ4_nwv       <= To_UX01(UDQ4_ipd);    UDQ5_nwv       <= To_UX01(UDQ5_ipd);    UDQ6_nwv       <= To_UX01(UDQ6_ipd);    UDQ7_nwv       <= To_UX01(UDQ7_ipd);    LDQS_nwv       <= To_UX01(LDQS_ipd);    LDQSNeg_nwv    <= To_UX01(LDQSNeg_ipd);    UDQS_nwv       <= To_UX01(UDQS_ipd);    UDQSNeg_nwv    <= To_UX01(UDQSNeg_ipd);    RESETNeg_nwv   <= To_UX01(RESETNeg_ipd);    ----------------------------------------------------------------------------    -- Main Behavior Block    ----------------------------------------------------------------------------    Behavior: BLOCK        PORT (            ODT            : IN    std_ulogic := 'U';            CK             : IN    std_ulogic := 'U';            CKNeg          : IN    std_ulogic := 'U';

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