📄 idt71016.ftm

📁 vhdl cod for ram.For sp3e
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<!DOCTYPE FTML SYSTEM "ftml.dtd"><FTML><HEAD><TITLE>FMF Timing for idt71016 Parts</TITLE><BODY><REVISION.HISTORY>version: |  author:  | mod date: | changes made:  V1.0    R. Munden    00 Jan 01   Initial release  V1.1    R. Munden    03 Feb 01   Added 30 new 3.3V part numbers</REVISION.HISTORY><TIMESCALE>1ns</TIMESCALE><MODEL>idt71016<FMFTIME>CY7C1021CV33-8VC<SOURCE>Cypress Semiconductor 38-05132 Rev. C October 30, 2002</SOURCE>CY7C1021CV33-8ZC<SOURCE>Cypress Semiconductor 38-05132 Rev. C October 30, 2002</SOURCE>CY7C1021CV33-8BAC<SOURCE>Cypress Semiconductor 38-05132 Rev. C October 30, 2002</SOURCE><COMMENT>Values are for VCC=3.0V to 3.6V, CL=30pF, Ta=0C to 70C</COMMENT><COMMENT>Values not provided were derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH BLENeg D0 () () (1.3:2.6:4.0) (0.0:2.5:5.0) (1.3:2.6:4.0) (0.0:2.5:5.0))    (IOPATH OENeg D0 () () (1.3:2.6:4.0) (0.0:2.5:5.0) (1.3:2.6:4.0) (0.0:2.5:5.0))    (IOPATH CENeg D0 () () (1.3:2.6:4.0) (3.0:6.0:8.0) (1.3:2.6:4.0) (3.0:6.0:8.0))    (IOPATH A0 D0 (3.0:6.0:8.0) (3.0:6.0:8.0))  ))  (TIMINGCHECK    (SETUP BLENeg WENeg (6))    (SETUP D0 WENeg (5))    (SETUP D0 CENeg (5))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (6))  )</TIMING></FMFTIME><FMFTIME>CY7C1021CV33-10VC<SOURCE>Cypress Semiconductor 38-05132 Rev. C October 30, 2002</SOURCE>CY7C1021CV33-10ZC<SOURCE>Cypress Semiconductor 38-05132 Rev. C October 30, 2002</SOURCE>CY7C1021CV33-10BAC<SOURCE>Cypress Semiconductor 38-05132 Rev. C October 30, 2002</SOURCE><COMMENT>Values are for VCC=3.0V to 3.6V, CL=30pF, Ta=0C to 70C</COMMENT><COMMENT>Values not provided were derived</COMMENT>CY7C1021-10VC<SOURCE>Cypress Semiconductor data sheet November 18, 1998</SOURCE>CY7C1021-10ZC<SOURCE>Cypress Semiconductor data sheet November 18, 1998</SOURCE>CY7C1021L-10ZC<SOURCE>Cypress Semiconductor data sheet November 18, 1998</SOURCE><COMMENT>Values are for VCC=4.5V to 5.5V, CL=30pF, Ta=0C to 70C</COMMENT><COMMENT>Values not provided were derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH BLENeg D0 () () (1.5:2.5:5.0) (0.0:2.5:5.0) (1.5:2.5:5.0) (0.0:2.5:5.0))    (IOPATH OENeg D0 () () (1.5:2.5:5.0) (0.0:2.5:5.0) (1.5:2.5:5.0) (0.0:2.5:5.0))    (IOPATH CENeg D0 () () (1.5:2.5:5.0) (3.0:6.0:10.0) (1.5:2.5:5.0) (3.0:6.0:10.0))    (IOPATH A0 D0 (3.0:6.0:10.0) (3.0:6.0:10.0))  ))  (TIMINGCHECK    (SETUP BLENeg WENeg (7))    (SETUP D0 WENeg (5))    (SETUP D0 CENeg (5))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (7))  )</TIMING></FMFTIME><FMFTIME>CY7C1021CV33-12VC<SOURCE>Cypress Semiconductor 38-05132 Rev. C October 30, 2002</SOURCE>CY7C1021CV33-12ZC<SOURCE>Cypress Semiconductor 38-05132 Rev. C October 30, 2002</SOURCE>CY7C1021CV33-12BAC<SOURCE>Cypress Semiconductor 38-05132 Rev. C October 30, 2002</SOURCE><COMMENT>Values are for VCC=3.0V to 3.6V, CL=30pF, Ta=0C to 70C</COMMENT><COMMENT>Values not provided were derived</COMMENT>CY7C1021-12VC<SOURCE>Cypress Semiconductor data sheet November 18, 1998</SOURCE>CY7C1021-12VI<SOURCE>Cypress Semiconductor data sheet November 18, 1998</SOURCE>CY7C1021-12ZC<SOURCE>Cypress Semiconductor data sheet November 18, 1998</SOURCE><COMMENT>Values are for VCC=4.5V to 5.5V, CL=30pF, Ta=0C to 70C</COMMENT><COMMENT>Values not provided were derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH BLENeg D0 () () (1.5:3.0:6.0) (0.0:3.0:6.0) (1.5:3.0:6.0) (0.0:3.0:6.0))    (IOPATH OENeg D0 () () (1.5:3.0:6.0) (0.0:3.0:6.0) (1.5:3.0:6.0) (0.0:3.0:6.0))    (IOPATH CENeg D0 () () (1.5:3.0:6.0) (3.0:6.0:12.0) (1.5:3.0:6.0) (3.0:6.0:12.0))    (IOPATH A0 D0 (3.0:6.0:12.0) (3.0:6.0:12.0))  ))  (TIMINGCHECK    (SETUP BLENeg WENeg (8))    (SETUP D0 WENeg (6))    (SETUP D0 CENeg (6))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (8))  )</TIMING></FMFTIME><FMFTIME>CY7C1021CV33-15VC<SOURCE>Cypress Semiconductor 38-05132 Rev. C October 30, 2002</SOURCE>CY7C1021CV33-15ZC<SOURCE>Cypress Semiconductor 38-05132 Rev. C October 30, 2002</SOURCE>CY7C1021CV33-15BAC<SOURCE>Cypress Semiconductor 38-05132 Rev. C October 30, 2002</SOURCE><COMMENT>Values are for VCC=3.0V to 3.6V, CL=30pF, Ta=0C to 70C</COMMENT><COMMENT>Values not provided were derived</COMMENT>CY7C1021-15VC<SOURCE>Cypress Semiconductor data sheet November 18, 1998</SOURCE>CY7C1021-15VI<SOURCE>Cypress Semiconductor data sheet November 18, 1998</SOURCE>CY7C1021-15ZC<SOURCE>Cypress Semiconductor data sheet November 18, 1998</SOURCE>CY7C1021-15ZI<SOURCE>Cypress Semiconductor data sheet November 18, 1998</SOURCE>CY7C1021L-15ZC<SOURCE>Cypress Semiconductor data sheet November 18, 1998</SOURCE><COMMENT>Values are for VCC=4.5V to 5.5V, CL=30pF, Ta=0C to 70C</COMMENT><COMMENT>Values not provided were derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH BLENeg D0 () () (1.5:3.5:7.0) (0.0:3.5:7.0) (1.5:3.5:7.0) (0.0:3.5:7.0))    (IOPATH OENeg D0 () () (1.5:3.5:7.0) (0.0:3.5:7.0) (1.5:3.5:7.0) (0.0:3.5:7.0.))    (IOPATH CENeg D0 () () (1.5:3.5:7.0) (3.0:7.5:15.0) (1.5:3.5:7.0) (3.0:7.5:15.0))    (IOPATH A0 D0 (3.0:7.5:15.0) (3.0:7.5:15.0))  ))  (TIMINGCHECK    (SETUP BLENeg WENeg (9))    (SETUP D0 WENeg (8))    (SETUP D0 CENeg (8))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (10))  )</TIMING></FMFTIME><FMFTIME>CY7C1021-20VC<SOURCE>Cypress Semiconductor data sheet November 18, 1998</SOURCE>CY7C1021-20ZC<SOURCE>Cypress Semiconductor data sheet November 18, 1998</SOURCE><COMMENT>Values are for VCC=4.5V to 5.5V, CL=30pF, Ta=0C to 70C</COMMENT><COMMENT>Values not provided were derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH BLENeg D0 () () (2.0:4.5:9.0) (0.0:4.5:9.0) (2.0:4.5:9.0) (0.0:4.5:9.0))    (IOPATH OENeg D0 () () (2.0:4.5:9.0) (0.0:4.5:9.0) (2.0:4.5:9.0) (0.0:4.5:9.0))    (IOPATH CENeg D0 () () (2.0:4.5:9.0) (3.0:10.0:20.0) (2.0:4.5:9.0) (3.0:10.0:20.0))    (IOPATH A0 D0 (3.0:10.0:20.0) (3.0:10.0:20.0))  ))  (TIMINGCHECK    (SETUP BLENeg WENeg (12))    (SETUP D0 WENeg (10))    (SETUP D0 CENeg (10))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (12))  )</TIMING></FMFTIME><FMFTIME>IDT71V016SA10BF<SOURCE>Integrated Device Technology DSC-3834/06 June 2002</SOURCE>IDT71V016SA10PH<SOURCE>Integrated Device Technology DSC-3834/06 June 2002</SOURCE>IDT71V016SA10Y<SOURCE>Integrated Device Technology DSC-3834/06 June 2002</SOURCE><COMMENT>Values are for VCC=3.15V to 3.6V, CL=30pF, Ta=0C to 70C</COMMENT><COMMENT>Values not provided were derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH BLENeg D0 () () (1.5:2.5:5.0) (0.0:2.5:5.0) (1.5:2.5:5.0) (0.0.:3.5:7.0))    (IOPATH OENeg D0 () () (1.5:2.5:5.0) (0.0:2.5:5.0) (1.5:2.5:5.0) (0.0.:2.5:5.0))    (IOPATH CENeg D0 () () (1.5:2.5:5.0) (4.0:7.0:10.0) (1.5:2.5:5.0) (4.0:7.0:10.0))    (IOPATH A0 D0 (4.0:7.0:10.0) (4.0:7.0:10.0))  ))  (TIMINGCHECK    (SETUP BLENeg WENeg (7))    (SETUP D0 WENeg (5))    (SETUP D0 CENeg (5))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (7))  )</TIMING></FMFTIME><FMFTIME>IDT71V016SA12BF<SOURCE>Integrated Device Technology DSC-3834/06 June 2002</SOURCE>IDT71V016SA12PH<SOURCE>Integrated Device Technology DSC-3834/06 June 2002</SOURCE>IDT71V016SA12Y<SOURCE>Integrated Device Technology DSC-3834/06 June 2002</SOURCE><COMMENT>Values are for VCC=3.0V to 3.6V, CL=30pF, Ta=0C to 70C</COMMENT><COMMENT>Values not provided were derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH BLENeg D0 () () (1.5:3.0:6.0) (0.0:3.0:6.0) (1.5:3.0:6.0) (0.0.:3.0:6.0))    (IOPATH OENeg D0 () () (1.5:3.0:6.0) (0.0:3.0:6.0) (1.5:3.0:6.0) (0.0.:3.0:6.0))    (IOPATH CENeg D0 () () (1.5:3.0:6.0) (4.0:8.0:12.0) (1.5:3.0:6.0) (4.0:8.0:12.0))    (IOPATH A0 D0 (4.0:8.0:12.0) (4.0:8.0:12.0))  ))  (TIMINGCHECK    (SETUP BLENeg WENeg (8))    (SETUP D0 WENeg (6))    (SETUP D0 CENeg (6))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (8))  )</TIMING></FMFTIME><FMFTIME>IDT71V016SA15BF<SOURCE>Integrated Device Technology DSC-3834/06 June 2002</SOURCE>IDT71V016SA15PH<SOURCE>Integrated Device Technology DSC-3834/06 June 2002</SOURCE>IDT71V016SA15Y<SOURCE>Integrated Device Technology DSC-3834/06 June 2002</SOURCE><COMMENT>Values are for VCC=3.0V to 3.6V, CL=30pF, Ta=0C to 70C</COMMENT><COMMENT>Values not provided were derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH BLENeg D0 () () (1.5:3.0:6.0) (0.0:4.0:7.0) (1.5:3.0:6.0) (0.0:4.0:7.0))    (IOPATH OENeg D0 () () (1.5:3.0:6.0) (0.0:4.0:7.0) (1.5:3.0:6.0) (0.0:4.0:7.0))    (IOPATH CENeg D0 () () (1.5:3.0:6.0) (5.0:10.0:15.0) (1.5:3.0:6.0) (5.0:10.0:15.0))    (IOPATH A0 D0 (4.0:8.0:15.0) (4.0:8.0:15.0))  ))  (TIMINGCHECK    (SETUP BLENeg WENeg (10))    (SETUP D0 WENeg (7))    (SETUP D0 CENeg (7))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (10))  )</TIMING></FMFTIME><FMFTIME>IDT71V016SA20BF<SOURCE>Integrated Device Technology DSC-3834/06 June 2002</SOURCE>IDT71V016SA20PH<SOURCE>Integrated Device Technology DSC-3834/06 June 2002</SOURCE>IDT71V016SA20Y<SOURCE>Integrated Device Technology DSC-3834/06 June 2002</SOURCE><COMMENT>Values are for VCC=3.0V to 3.6V, CL=30pF, Ta=0C to 70C</COMMENT><COMMENT>Values not provided were derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH BLENeg D0 () () (2:4:8) (0:4:8) (2:4:8) (0:4:8))    (IOPATH OENeg D0 () () (2:4:8) (0:4:8) (2:4:8) (0:4:8))    (IOPATH CENeg D0 () () (2:4:8) (5:14:20) (2:4:8) (5:14:20))    (IOPATH A0 D0 (5:14:20) (5:14:20))  ))  (TIMINGCHECK    (SETUP BLENeg WENeg (12))    (SETUP D0 WENeg (9))    (SETUP D0 CENeg (9))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (12))  )</TIMING></FMFTIME><FMFTIME>IDT71016S12PH<SOURCE>Integrated Device Technology DSC-3210/6 September 1999</SOURCE>IDT71016S12Y<SOURCE>Integrated Device Technology DSC-3210/6 September 1999</SOURCE>
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