idt703399prf.vhd

vhdl cod for ram.For sp3e

                                       AND RWR_nwv = '0' AND BE1RNeg_nwv = '0'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_IOR1In_CLKRIn,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_IOR1In_CLKRIn );

                VitalSetupHoldCheck (
                    TestSignal      => IOR0In,
                    TestSignalName  => "IOR0",
                    RefSignal       => CLKRIn,
                    RefSignalName   => "CLKR",
                    SetupHigh       => tsetup_IOL0_CLKL,
                    SetupLow        => tsetup_IOL0_CLKL,
                    HoldHigh        => thold_IOL0_CLKL,
                    HoldLow         => thold_IOL0_CLKL,
                    CheckEnabled    => (CE0RNeg_nwv ='0' AND CE1R_nwv = '1'
                                       AND RWR_nwv = '0' AND BE0RNeg_nwv = '0'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_IOR0In_CLKRIn,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_IOR0In_CLKRIn );

                VitalSetupHoldCheck (
                    TestSignal      => BE1LNegIn,
                    TestSignalName  => "BE1LNeg",
                    RefSignal       => CLKLIn,
                    RefSignalName   => "CLKL",
                    SetupHigh       => tsetup_ADSLNeg_CLKL,
                    SetupLow        => tsetup_ADSLNeg_CLKL,
                    HoldHigh        => thold_ADSLNeg_CLKL,
                    HoldLow         => thold_ADSLNeg_CLKL,
                    CheckEnabled    => (CE0LNeg_nwv ='0' AND CE1L_nwv = '1'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_BE1LNegIn_CLKLIn,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_BE1LNegIn_CLKLIn );

                VitalSetupHoldCheck (
                    TestSignal      => BE0LNegIn,
                    TestSignalName  => "BE0LNeg",
                    RefSignal       => CLKLIn,
                    RefSignalName   => "CLKL",
                    SetupHigh       => tsetup_ADSLNeg_CLKL,
                    SetupLow        => tsetup_ADSLNeg_CLKL,
                    HoldHigh        => thold_ADSLNeg_CLKL,
                    HoldLow         => thold_ADSLNeg_CLKL,
                    CheckEnabled    => (CE0LNeg_nwv ='0' AND CE1L_nwv = '1'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_BE0LNegIn_CLKLIn,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_BE0LNegIn_CLKLIn );

                VitalSetupHoldCheck (
                    TestSignal      => BE1RNegIn,
                    TestSignalName  => "BE1RNeg",
                    RefSignal       => CLKRIn,
                    RefSignalName   => "CLKR",
                    SetupHigh       => tsetup_ADSLNeg_CLKL,
                    SetupLow        => tsetup_ADSLNeg_CLKL,
                    HoldHigh        => thold_ADSLNeg_CLKL,
                    HoldLow         => thold_ADSLNeg_CLKL,
                    CheckEnabled    => (CE0RNeg_nwv ='0' AND CE1R_nwv = '1'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_BE1RNegIn_CLKRIn,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_BE1RNegIn_CLKRIn );

                VitalSetupHoldCheck (
                    TestSignal      => BE0RNegIn,
                    TestSignalName  => "BE0RNeg",
                    RefSignal       => CLKRIn,
                    RefSignalName   => "CLKR",
                    SetupHigh       => tsetup_ADSLNeg_CLKL,
                    SetupLow        => tsetup_ADSLNeg_CLKL,
                    HoldHigh        => thold_ADSLNeg_CLKL,
                    HoldLow         => thold_ADSLNeg_CLKL,
                    CheckEnabled    => (CE0RNeg_nwv ='0' AND CE1R_nwv = '1'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_BE0RNegIn_CLKRIn,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_BE0RNegIn_CLKRIn );

                VitalSetupHoldCheck (
                    TestSignal      => ADSLNegIn,
                    TestSignalName  => "ADSLNeg",
                    RefSignal       => CLKLIn,
                    RefSignalName   => "CLKL",
                    SetupHigh       => tsetup_ADSLNeg_CLKL,
                    SetupLow        => tsetup_ADSLNeg_CLKL,
                    HoldHigh        => thold_ADSLNeg_CLKL,
                    HoldLow         => thold_ADSLNeg_CLKL,
                    CheckEnabled    => (CE0LNeg_nwv ='0' AND CE1L_nwv = '1'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_ADSLNegIn_CLKLIn,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_ADSLNegIn_CLKLIn );

                VitalSetupHoldCheck (
                    TestSignal      => ADSRNegIn,
                    TestSignalName  => "ADSRNeg",
                    RefSignal       => CLKRIn,
                    RefSignalName   => "CLKR",
                    SetupHigh       => tsetup_ADSLNeg_CLKL,
                    SetupLow        => tsetup_ADSLNeg_CLKL,
                    HoldHigh        => thold_ADSLNeg_CLKL,
                    HoldLow         => thold_ADSLNeg_CLKL,
                    CheckEnabled    => (CE0RNeg_nwv ='0' AND CE1R_nwv = '1'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_ADSRNegIn_CLKRIn,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_ADSRNegIn_CLKRIn );

                VitalSetupHoldCheck (
                    TestSignal      => CNTENLNegIn,
                    TestSignalName  => "CNTENLNeg",
                    RefSignal       => CLKLIn,
                    RefSignalName   => "CLKL",
                    SetupHigh       => tsetup_CNTENLNeg_CLKL,
                    SetupLow        => tsetup_CNTENLNeg_CLKL,
                    HoldHigh        => thold_CNTENLNeg_CLKL,
                    HoldLow         => thold_CNTENLNeg_CLKL,
                    CheckEnabled    => (CE0LNeg_nwv ='0' AND CE1L_nwv = '1'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_CNTENLNegIn_CLKLIn,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_CNTENLNegIn_CLKLIn );

                VitalSetupHoldCheck (
                    TestSignal      => CNTENRNegIn,
                    TestSignalName  => "CNTENRNeg",
                    RefSignal       => CLKRIn,
                    RefSignalName   => "CLKR",
                    SetupHigh       => tsetup_CNTENLNeg_CLKL,
                    SetupLow        => tsetup_CNTENLNeg_CLKL,
                    HoldHigh        => thold_CNTENLNeg_CLKL,
                    HoldLow         => thold_CNTENLNeg_CLKL,
                    CheckEnabled    => (CE0RNeg_nwv ='0' AND CE1R_nwv = '1'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_CNTENRNegIn_CLKRIn,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_CNTENRNegIn_CLKRIn );

                VitalSetupHoldCheck (
                    TestSignal      => REPEATLNegIn,
                    TestSignalName  => "REPEATLNeg",
                    RefSignal       => CLKLIn,
                    RefSignalName   => "CLKL",
                    SetupHigh       => tsetup_REPEATLNeg_CLKL,
                    SetupLow        => tsetup_REPEATLNeg_CLKL,
                    HoldHigh        => thold_REPEATLNeg_CLKL,
                    HoldLow         => thold_REPEATLNeg_CLKL,
                    CheckEnabled    => (CE0LNeg_nwv ='0' AND CE1L_nwv = '1'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_REPEATLNegIn_CLKLIn,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_REPEATLNegIn_CLKLIn );

                VitalSetupHoldCheck (
                    TestSignal      => REPEATRNegIn,
                    TestSignalName  => "REPEATRNeg",
                    RefSignal       => CLKRIn,
                    RefSignalName   => "CLKR",
                    SetupHigh       => tsetup_REPEATLNeg_CLKL,
                    SetupLow        => tsetup_REPEATLNeg_CLKL,
                    HoldHigh        => thold_REPEATLNeg_CLKL,
                    HoldLow         => thold_REPEATLNeg_CLKL,
                    CheckEnabled    => (CE0RNeg_nwv ='0' AND CE1R_nwv = '1'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_REPEATRNegIn_CLKRIn,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_REPEATRNegIn_CLKRIn );

                VitalPeriodPulseCheck (
                    TestSignal      =>  CLKLIn,
                    TestSignalName  =>  "CLKL",
                    Period          =>  tperiod_CLKR_PIPER_EQ_1_posedge,
                    PulseWidthLow   =>  tpw_CLKR_PIPER_EQ_1_negedge,
                    PulseWidthHigh  =>  tpw_CLKR_PIPER_EQ_1_posedge,
                    PeriodData      =>  TD_CLKLIn1,
                    XOn             =>  XOn,
                    MsgOn           =>  MsgOn,
                    HeaderMsg       =>  InstancePath & PartID,
                    CheckEnabled    =>  (PIPELIn = '0'),
                    Violation       =>  Pviol_CLKLIn1 );

                VitalPeriodPulseCheck (
                    TestSignal      =>  CLKRIn,
                    TestSignalName  =>  "CLKR",
                    Period          =>  tperiod_CLKR_PIPER_EQ_1_posedge,
                    PulseWidthLow   =>  tpw_CLKR_PIPER_EQ_1_negedge,
                    PulseWidthHigh  =>  tpw_CLKR_PIPER_EQ_1_posedge,
                    PeriodData      =>  TD_CLKRIn1,
                    XOn             =>  XOn,
                    MsgOn           =>  MsgOn,
                    HeaderMsg       =>  InstancePath & PartID,
                    CheckEnabled    =>  (PIPERIn = '1'),
                    Violation       =>  Pviol_CLKRIn1 );

               Violation := Tviol_ALIn_CLKLIn OR Tviol_ARIn_CLKRIn OR
                            Tviol_CE0LNegIn_CLKLIn OR Tviol_CE0RNegIn_CLKRIn OR
                            Tviol_CE1LIn_CLKLIn OR Tviol_CE1RIn_CLKRIn OR
                            Tviol_RWLIn_CLKLIn OR Tviol_RWRIn_CLKRIn OR
                            Tviol_IOL1In_CLKLIn OR Tviol_IOR1In_CLKRIn OR
                            Tviol_IOL0In_CLKLIn OR Tviol_IOR0In_CLKRIn OR
                            Tviol_BE1LNegIn_CLKLIn OR Tviol_BE1RNegIn_CLKRIn OR
                            Tviol_BE0LNegIn_CLKLIn OR Tviol_BE0RNegIn_CLKRIn OR
                            Tviol_ADSLNegIn_CLKLIn OR Tviol_ADSRNegIn_CLKRIn OR
                            Tviol_CNTENLNegIn_CLKLIn OR Tviol_CNTENRNegIn_CLKRIn
                            OR Tviol_REPEATLNegIn_CLKLIn OR
                            Tviol_REPEATRNegIn_CLKRIn OR
                            Pviol_CLKLIn1 OR Pviol_CLKRIn1;

            END IF; -- Timing Check Section

            --------------------------------------------------------------------
            -- Functional Section
            --------------------------------------------------------------------

            IF rising_edge(CLKLIn) THEN

                IF RWL_nwv = '1' AND PIPELIn = '1' THEN    -- read pipeline
                    IF BE0LNeg_reg = '0' AND CE0LNeg_reg = '0' AND
                           CE1L_reg = '1' THEN
                        IF DataTempL0 >= 0 THEN
                            DataL0Tmp := To_slv(DataTempL0, DataWidth);
                        ELSIF DataTempL0 = -2 THEN
                            DataL0Tmp := (OTHERS => 'U');
                        ELSE
                            DataL0Tmp := (OTHERS => 'X');
                        END IF;
                        IF LatencyL THEN
                            DataL0Tmp := (OTHERS => 'Z');