📄 idt70t3509m.vhd
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---------------------------------------------------------------------------------- File Name: idt70t3509m.vhd---------------------------------------------------------------------------------- Copyright (C) 2007 Free Model Foundry; http://www.FreeModelFoundry.com/---- This program is free software; you can redistribute it and/or modify-- it under the terms of the GNU General Public License version 2 as-- published by the Free Software Foundation.---- MODIFICATION HISTORY:---- version: | author: | mod date: | changes made:-- 1.0 V.Ljubisavljevic 07 FEB 23 initial release------------------------------------------------------------------------------------ PART DESCRIPTION:---- Library: RAM -- Technology: CMOS-- Part: IDT70T3509M---- Description: 1024K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM----------------------------------------------------------------------------------LIBRARY ieee; USE ieee.vital_primitives.ALL; USE ieee.vital_timing.ALL; USE ieee.std_logic_1164.ALL;LIBRARY fmf; USE fmf.gen_utils.ALL; USE fmf.conversions.all; USE STD.textio.ALL;--------------------------------------------------------------------------------- ENTITY DECLARATION-------------------------------------------------------------------------------ENTITY idt70t3509m IS GENERIC ( -- tipd delays: interconnect path delays tipd_CLKL : VitalDelayType01 := VitalZeroDelay01; tipd_CLKR : VitalDelayType01 := VitalZeroDelay01; tipd_CE0LNeg : VitalDelayType01 := VitalZeroDelay01; tipd_CE0RNeg : VitalDelayType01 := VitalZeroDelay01; tipd_CE1L : VitalDelayType01 := VitalZeroDelay01; tipd_CE1R : VitalDelayType01 := VitalZeroDelay01; tipd_RWL : VitalDelayType01 := VitalZeroDelay01; tipd_RWR : VitalDelayType01 := VitalZeroDelay01; tipd_OELNeg : VitalDelayType01 := VitalZeroDelay01; tipd_OERNeg : VitalDelayType01 := VitalZeroDelay01; tipd_PLFTL : VitalDelayType01 := VitalZeroDelay01; tipd_PLFTR : VitalDelayType01 := VitalZeroDelay01; tipd_ADSLNeg : VitalDelayType01 := VitalZeroDelay01; tipd_ADSRNeg : VitalDelayType01 := VitalZeroDelay01; tipd_CNTENLNeg : VitalDelayType01 := VitalZeroDelay01; tipd_CNTENRNeg : VitalDelayType01 := VitalZeroDelay01; tipd_REPEATLNeg : VitalDelayType01 := VitalZeroDelay01; tipd_REPEATRNeg : VitalDelayType01 := VitalZeroDelay01; tipd_BEL0Neg : VitalDelayType01 := VitalZeroDelay01; tipd_BEL1Neg : VitalDelayType01 := VitalZeroDelay01; tipd_BEL2Neg : VitalDelayType01 := VitalZeroDelay01; tipd_BEL3Neg : VitalDelayType01 := VitalZeroDelay01; tipd_BER0Neg : VitalDelayType01 := VitalZeroDelay01; tipd_BER1Neg : VitalDelayType01 := VitalZeroDelay01; tipd_BER2Neg : VitalDelayType01 := VitalZeroDelay01; tipd_BER3Neg : VitalDelayType01 := VitalZeroDelay01; tipd_ZZL : VitalDelayType01 := VitalZeroDelay01; tipd_ZZR : VitalDelayType01 := VitalZeroDelay01; tipd_AL0 : VitalDelayType01 := VitalZeroDelay01; tipd_AL1 : VitalDelayType01 := VitalZeroDelay01; tipd_AL2 : VitalDelayType01 := VitalZeroDelay01; tipd_AL3 : VitalDelayType01 := VitalZeroDelay01; tipd_AL4 : VitalDelayType01 := VitalZeroDelay01; tipd_AL5 : VitalDelayType01 := VitalZeroDelay01; tipd_AL6 : VitalDelayType01 := VitalZeroDelay01; tipd_AL7 : VitalDelayType01 := VitalZeroDelay01; tipd_AL8 : VitalDelayType01 := VitalZeroDelay01; tipd_AL9 : VitalDelayType01 := VitalZeroDelay01; tipd_AL10 : VitalDelayType01 := VitalZeroDelay01; tipd_AL11 : VitalDelayType01 := VitalZeroDelay01; tipd_AL12 : VitalDelayType01 := VitalZeroDelay01; tipd_AL13 : VitalDelayType01 := VitalZeroDelay01; tipd_AL14 : VitalDelayType01 := VitalZeroDelay01; tipd_AL15 : VitalDelayType01 := VitalZeroDelay01; tipd_AL16 : VitalDelayType01 := VitalZeroDelay01; tipd_AL17 : VitalDelayType01 := VitalZeroDelay01; tipd_AL18 : VitalDelayType01 := VitalZeroDelay01; tipd_AL19 : VitalDelayType01 := VitalZeroDelay01; tipd_AR0 : VitalDelayType01 := VitalZeroDelay01; tipd_AR1 : VitalDelayType01 := VitalZeroDelay01; tipd_AR2 : VitalDelayType01 := VitalZeroDelay01; tipd_AR3 : VitalDelayType01 := VitalZeroDelay01; tipd_AR4 : VitalDelayType01 := VitalZeroDelay01; tipd_AR5 : VitalDelayType01 := VitalZeroDelay01; tipd_AR6 : VitalDelayType01 := VitalZeroDelay01; tipd_AR7 : VitalDelayType01 := VitalZeroDelay01; tipd_AR8 : VitalDelayType01 := VitalZeroDelay01; tipd_AR9 : VitalDelayType01 := VitalZeroDelay01; tipd_AR10 : VitalDelayType01 := VitalZeroDelay01; tipd_AR11 : VitalDelayType01 := VitalZeroDelay01; tipd_AR12 : VitalDelayType01 := VitalZeroDelay01; tipd_AR13 : VitalDelayType01 := VitalZeroDelay01; tipd_AR14 : VitalDelayType01 := VitalZeroDelay01; tipd_AR15 : VitalDelayType01 := VitalZeroDelay01; tipd_AR16 : VitalDelayType01 := VitalZeroDelay01; tipd_AR17 : VitalDelayType01 := VitalZeroDelay01; tipd_AR18 : VitalDelayType01 := VitalZeroDelay01; tipd_AR19 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL0 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL1 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL2 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL3 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL4 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL5 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL6 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL7 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL8 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL9 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL10 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL11 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL12 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL13 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL14 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL15 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL16 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL17 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL18 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL19 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL20 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL21 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL22 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL23 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL24 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL25 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL26 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL27 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL28 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL29 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL30 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL31 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL32 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL33 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL34 : VitalDelayType01 := VitalZeroDelay01; tipd_IOL35 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR0 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR1 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR2 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR3 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR4 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR5 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR6 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR7 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR8 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR9 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR10 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR11 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR12 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR13 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR14 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR15 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR16 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR17 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR18 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR19 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR20 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR21 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR22 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR23 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR24 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR25 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR26 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR27 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR28 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR29 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR30 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR31 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR32 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR33 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR34 : VitalDelayType01 := VitalZeroDelay01; tipd_IOR35 : VitalDelayType01 := VitalZeroDelay01; --tpd values tpd_OELNeg_IOL0 : VitalDelayType01Z := UnitDelay01Z; tpd_OERNeg_IOR0 : VitalDelayType01Z := UnitDelay01Z; tpd_CLKL_INTLNeg : VitalDelayType01 := UnitDelay01; tpd_CLKR_INTLNeg : VitalDelayType01 := UnitDelay01; tpd_CLKR_INTRNeg : VitalDelayType01 := UnitDelay01; tpd_CLKL_INTRNeg : VitalDelayType01 := UnitDelay01; tpd_CLKL_IOL0_PIPELINE_EQ_1 : VitalDelayType01Z := UnitDelay01Z; tpd_CLKL_IOL0_NOPIPELINE_EQ_1 : VitalDelayType01Z := UnitDelay01Z; tpd_CLKR_IOR0_PIPELINE_EQ_1 : VitalDelayType01Z := UnitDelay01Z; tpd_CLKR_IOR0_NOPIPELINE_EQ_1 : VitalDelayType01Z := UnitDelay01Z; -- tsetup values: setup times tsetup_AL0_CLKL : VitalDelayType := UnitDelay; tsetup_AR0_CLKR : VitalDelayType := UnitDelay; tsetup_CE0LNeg_CLKL : VitalDelayType := UnitDelay; tsetup_CE0RNeg_CLKR : VitalDelayType := UnitDelay; tsetup_CE1L_CLKL : VitalDelayType := UnitDelay; tsetup_CE1R_CLKR : VitalDelayType := UnitDelay; tsetup_BEL0Neg_CLKL : VitalDelayType := UnitDelay; tsetup_BER0Neg_CLKR : VitalDelayType := UnitDelay; tsetup_RWL_CLKL : VitalDelayType := UnitDelay; tsetup_RWR_CLKR : VitalDelayType := UnitDelay; tsetup_IOL0_CLKL : VitalDelayType := UnitDelay; tsetup_IOR0_CLKR : VitalDelayType := UnitDelay; tsetup_ADSLNeg_CLKL : VitalDelayType := UnitDelay; tsetup_ADSRNeg_CLKR : VitalDelayType := UnitDelay; tsetup_CNTENLNeg_CLKL : VitalDelayType := UnitDelay; tsetup_CNTENRNeg_CLKR : VitalDelayType := UnitDelay; tsetup_REPEATLNeg_CLKL : VitalDelayType := UnitDelay; tsetup_REPEATRNeg_CLKR : VitalDelayType := UnitDelay; -- thold values: hold times thold_AL0_CLKL : VitalDelayType := UnitDelay; thold_AR0_CLKR : VitalDelayType := UnitDelay; thold_CE0LNeg_CLKL : VitalDelayType := UnitDelay; thold_CE0RNeg_CLKR : VitalDelayType := UnitDelay; thold_CE1L_CLKL : VitalDelayType := UnitDelay; thold_CE1R_CLKR : VitalDelayType := UnitDelay; thold_BEL0Neg_CLKL : VitalDelayType := UnitDelay; thold_BER0Neg_CLKR : VitalDelayType := UnitDelay; thold_RWL_CLKL : VitalDelayType := UnitDelay; thold_RWR_CLKR : VitalDelayType := UnitDelay; thold_IOL0_CLKL : VitalDelayType := UnitDelay; thold_IOR0_CLKR : VitalDelayType := UnitDelay; thold_ADSLNeg_CLKL : VitalDelayType := UnitDelay; thold_ADSRNeg_CLKR : VitalDelayType := UnitDelay; thold_CNTENLNeg_CLKL : VitalDelayType := UnitDelay; thold_CNTENRNeg_CLKR : VitalDelayType := UnitDelay; thold_REPEATLNeg_CLKL : VitalDelayType := UnitDelay; thold_REPEATRNeg_CLKR : VitalDelayType := UnitDelay; -- pulse width tpw_CLKL_PIPELINE_EQ_1_negedge : VitalDelayType := UnitDelay; tpw_CLKL_NOPIPELINE_EQ_1_negedge : VitalDelayType := UnitDelay; tpw_CLKR_PIPELINE_EQ_1_negedge : VitalDelayType := UnitDelay; tpw_CLKR_NOPIPELINE_EQ_1_negedge : VitalDelayType := UnitDelay; tpw_CLKL_PIPELINE_EQ_1_posedge : VitalDelayType := UnitDelay; tpw_CLKL_NOPIPELINE_EQ_1_posedge : VitalDelayType := UnitDelay; tpw_CLKR_PIPELINE_EQ_1_posedge : VitalDelayType := UnitDelay; tpw_CLKR_NOPIPELINE_EQ_1_posedge : VitalDelayType := UnitDelay; -- tperiod values tperiod_CLKL_PIPELINE_EQ_1 : VitalDelayType := UnitDelay; tperiod_CLKL_NOPIPELINE_EQ_1 : VitalDelayType := UnitDelay; tperiod_CLKR_PIPELINE_EQ_1 : VitalDelayType := UnitDelay; tperiod_CLKR_NOPIPELINE_EQ_1 : VitalDelayType := UnitDelay; -- tdevice values: values for internal delays tdevice_SKEW : VitalDelayType := 6 ns; -- generic control parameters InstancePath : STRING := DefaultInstancePath; TimingChecksOn : BOOLEAN := DefaultTimingChecks; MsgOn : BOOLEAN := DefaultMsgOn; XOn : BOOLEAN := DefaultXon; -- memory file to be loaded mem_file_name : STRING := "none"; --"idt70t3509m.mem";⌨️ 快捷键说明
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