mt46v32m8.vhd

vhdl cod for ram.For sp3e

                   -- read burst length
                  IF (ModeReg(2 downto 0) = "001") THEN
                       Burst_Length := 2;
                       Burst_Bits := 1;
                   ELSIF (ModeReg(2 downto 0) = "010") THEN
                       Burst_Length := 4;
                       Burst_Bits := 2;
                   ELSIF (ModeReg(2 downto 0) = "011") THEN
                       Burst_Length := 8;
                       Burst_Bits := 3;
                   ELSE
                       ASSERT false
                           REPORT InstancePath & partID & BankString
                                  &": Invalid burst length specified."
                           SEVERITY SeverityMode;
                   END IF;
                   -- read burst type
                   IF (ModeReg(3) = '0') THEN
                       Burst := sequential;
                   ELSIF (ModeReg(3) = '1') THEN
                       Burst := interleave;
                   ELSE
                       ASSERT false
                           REPORT InstancePath & partID & BankString
                                  &": Invalid burst type specified."
                           SEVERITY SeverityMode;
                   END IF;
                   -- read CAS latency
                   IF (ModeReg(6 downto 4) = "010") THEN
                       CAS_Lat <= 2;
                   ELSIF (ModeReg(6 downto 4) = "110") THEN
                       CAS_Lat <= 3;
                   ELSE
                       ASSERT false
                       REPORT InstancePath & partID & BankString &
                           ": CAS Latency set incorrecty "
                       SEVERITY SeverityMode;
                   END IF;
                    IF (ModeReg(8) = '1') THEN
                        DLL_reset <= TRUE;
                    ELSE
                        DLL_reset <= FALSE;
                    END IF;
               ELSIF mode_set_ind=extended THEN
                    IF (ExtModeReg( 0) = '0') THEN
                        DLL_EN <= TRUE;
                    ELSE
                        DLL_EN <= FALSE;
                    END IF;
                END IF;
            WHEN auto_refresh =>
                IF (Ref_Cnt < 8192) THEN
                    Ref_Cnt := Ref_Cnt + 1;
                END IF;
                ASSERT command = nop
                    REPORT InstancePath & partID & BankString &
                           ": Illegal command received during auto_refresh."
                    SEVERITY SeverityMode;

            WHEN bank_act =>
                IF (command = pre) AND ((cur_bank = bank) OR
                        (AddressIn(10) = '1')) THEN
                    ASSERT ras_out(bank) = '1'
                        REPORT InstancePath & partID & BankString &
                               ": precharge command"
                               & " does not meet tRAS time."
                        SEVERITY SeverityMode;
                        statebank(bank) <= precharge, idle AFTER tdevice_TRP;
                ELSIF (command = nop OR command = bst) OR
                        (cur_bank /= bank) THEN
                    null;
                ELSIF (command = read) THEN
                    ASSERT rcdt_out(bank) = '0'
                        REPORT InstancePath & partID & BankString &
                               ": read command received too soon after active."
                        SEVERITY SeverityMode;
                    ASSERT ((AddressIn(10) = '0') OR (AddressIn(10) = '1'))
                        REPORT InstancePath & partID & BankString &
                               ": AddressIn(10) = X"
                               & " during read command. Next state unknown."
                        SEVERITY SeverityMode;

                    FixColumnAddress(bank);

                    IF NOT(DQSDrive2='0' AND DQSDrive3='0') THEN
                        DQSDrive1:='0';
                    END IF;

                    ReadFromMem(bank);

                    Burst_Cnt(bank) := 0;
                    statebank(bank)<=read_sec;
                    IF (AddressIn(10) = '0') THEN
                        next_statebank(bank) <= read;
                    ELSIF (AddressIn(10) = '1') THEN
                        next_statebank(bank) <= read_auto_pre;
                    END IF;
                ELSIF (command = writ) THEN
                    ASSERT rcdt_out(bank) = '0'
                        REPORT InstancePath & partID & BankString &
                               ": write command"
                               & " received too soon after active."
                        SEVERITY SeverityMode;

                    FixColumnAddress(bank);

                    ASSERT ((AddressIn(10) = '0') OR (AddressIn(10) = '1'))
                        REPORT InstancePath & partID & BankString &
                               ": AddressIn(10) = X"
                               & " during write command. Next state unknown."
                        SEVERITY SeverityMode;
                    IF (AddressIn(10) = '0') THEN
                        statebank(bank) <= write;
                    ELSIF (AddressIn(10) = '1') THEN
                        statebank(bank) <= write_auto_pre;
                    END IF;
                    written := true;

                ELSIF (cur_bank = bank) OR (command = mrs) THEN
                    ASSERT false
                        REPORT InstancePath & partID & BankString &
                               ": Illegal command "
                               & "received in active state."
                        SEVERITY SeverityMode;
                END IF;

            WHEN write =>
                IF (command = bst) THEN
                    IF rising_edge(CLKIn) THEN
                        ASSERT false
                            REPORT InstancePath & partID & BankString &
                               ": Illegal command "
                               & "received in write state."
                            SEVERITY SeverityMode;
                    END IF;
                ELSIF (command = read) THEN
                    IF cur_bank = bank THEN

                        FixColumnAddress(bank);

                        Burst_Cnt(bank) := 0;

                        ReadFromMem(bank);


                        Burst_Cnt(bank) := Burst_Cnt(bank) + 1;
                        statebank(bank) <= read_sec;
                        IF (AddressIn(10) = '0') THEN
                            next_statebank(bank) <= read;
                        ELSIF (AddressIn(10) = '1') THEN
                            next_statebank(bank) <= read_auto_pre;
                        END IF;
                    ELSE
                        statebank(bank) <= bank_act;
                    END IF;
                ELSIF (command = writ) THEN
                    IF (Burst_Cnt(bank) = Burst_Length) THEN
                        statebank(bank) <= bank_act;
                        Burst_Cnt(bank) := 0;
                        ras_in(bank) <= '1';
                        Burst_Inc(bank) := 0;
                    ELSE
                        statebank(bank) <= write_sec;

                        WriteToMem(bank);

                        Location2 := Location;
                        write_to_write := TRUE;
                        Burst_Inc(bank) := 0;

                        FixColumnAddress(bank);

                        ASSERT ((AddressIn(10) = '0') OR
                                (AddressIn(10) = '1'))
                            REPORT InstancePath & partID & BankString &
                              ": AddressIn(10) = X"
                              & " during write command. Next state unknown."
                            SEVERITY SeverityMode;
                        IF (AddressIn(10) = '0') THEN
                            next_statebank(bank) <= write;
                        ELSIF (AddressIn(10) = '1') THEN
                            next_statebank(bank) <= write_auto_pre;
                        END IF;
                        Burst_Cnt(bank) := 0;
                        wrt_in <= '1';
                        written := true;
                    END IF;
                    IF cur_bank /= bank THEN
                        next_statebank(bank) <= bank_act;
                    ELSE
                        next_statebank(bank)<=write;
                    END IF;
                ELSIF (command = pre) AND ((cur_bank = bank) OR
                            (AddressIn(10) = '1')) THEN
                    ASSERT ras_out(bank) = '1'
                        REPORT InstancePath & partID & BankString &
                               ": precharge command"
                               & " does not meet tRAS time."
                        SEVERITY SeverityMode;
                        statebank(bank) <= precharge, idle AFTER tdevice_TRP;
                    ASSERT (DM_nwv = '1')
                        REPORT InstancePath & partID & BankString &
                               ": DM should be"
                               & " held high, data is lost."
                        SEVERITY SeverityMode;
                        statebank(bank) <= precharge, idle AFTER tdevice_TRP;
                ELSIF (command = nop) OR (cur_bank /= bank) THEN
                    IF (Burst_Cnt(bank) = Burst_Length) THEN
                        statebank(bank) <= bank_act;
                        Burst_Cnt(bank) := 0;
                        ras_in(bank) <= '1';
                        Burst_Inc(bank) := 0;
                    ELSE
                        statebank(bank) <= write_sec;
                        next_statebank(bank)<=write;
                        Location := BaseLoc(bank) + Burst_Inc(bank);

                        BurstCtrl(bank);

                        WriteToMem(bank);

                        Burst_Cnt(bank) := Burst_Cnt(bank) + 1;
                        wrt_in <= '1';
                    END IF;
                ELSIF cur_bank = bank THEN
                    ASSERT false
                        REPORT InstancePath & partID & ": Illegal command"
                               & " received in write state."
                        SEVERITY SeverityMode;
                END IF;

            WHEN read =>
                IF (command = bst) THEN
                    statebank(bank) <= bank_act;
                    Burst_Cnt(bank) := 0;
                    Burst_Inc(bank) := 0;
                    DQSDrive:='0';
                ELSIF (command = read) THEN
                    IF cur_bank = bank THEN

                        FixColumnAddress(bank);

                        Burst_Cnt(bank) := 0;

                        ReadFromMem(bank);

                        Burst_Cnt(bank) := Burst_Cnt(bank) + 1;
                        statebank(bank) <= read_sec;
                        IF (AddressIn(10) = '0') THEN
                            next_statebank(bank) <= read;
                        ELSIF (AddressIn(10) = '1') THEN
                            next_statebank(bank) <= read_auto_pre;
                        END IF;
                    ELSE
                        statebank(bank) <= bank_act;
                    END IF;
                ELSIF (command = writ) THEN
                    IF cur_bank = bank THEN
                        IF (Burst_Cnt(bank) = Burst_Length) THEN
                            statebank(bank) <= bank_act;
                            Burst_Cnt(bank) := 0;
                            ras_in(bank) <= '1';
                            Burst_Inc(bank) := 0;
                        ELSE
                            statebank(bank) <= write_sec;
                            next_statebank(bank)<=write;

                            WriteToMem(bank);

                            Location2 := Location;
                            write_to_write := TRUE;

                            FixColumnAddress(bank);

                            ASSERT ((AddressIn(10) = '0') OR
                                    (AddressIn(10) = '1'))
                                REPORT InstancePath & partID & BankString &
                                    ": AddressIn(10) = X"
                                & " during write command. Next state unknown."
                                SEVERITY SeverityMode;
                            IF (AddressIn(10) = '0') THEN
                                next_statebank(bank) <= write;
                            ELSIF (AddressIn(10) = '1') THEN
                                next_statebank(bank) <= write_auto_pre;
                            END IF;
                            Burst_Cnt(bank) := 0;
                            wrt_in <= '1';
                            written := true;
                        END IF;
                    ELSE