k7r323682m.vhd

vhdl cod for ram.For sp3e

                VitalSetupHoldCheck (
                    TestSignal      => Dat1In,
                    TestSignalName  => "Dat1In",
                    RefSignal       => KIn,
                    RefSignalName   => "K",
                    SetupLow        => tsetup_D0_K,
                    HoldLow         => thold_D0_K,
                    CheckEnabled    => ( WNeg_nwv = '0' AND BW1Neg_nwv = '0'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_D1_K,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_D1_K );

                VitalSetupHoldCheck (
                    TestSignal      => Dat2In,
                    TestSignalName  => "Dat2In",
                    RefSignal       => KIn,
                    RefSignalName   => "K",
                    SetupLow        => tsetup_D0_K,
                    HoldLow         => thold_D0_K,
                    CheckEnabled    => ( WNeg_nwv = '0' AND BW2Neg_nwv = '0'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_D2_K,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_D2_K );

                VitalSetupHoldCheck (
                    TestSignal      => Dat3In,
                    TestSignalName  => "Dat3In",
                    RefSignal       => KIn,
                    RefSignalName   => "K",
                    SetupLow        => tsetup_D0_K,
                    HoldLow         => thold_D0_K,
                    CheckEnabled    => ( WNeg_nwv = '0' AND BW3Neg_nwv = '0'),
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_D3_K,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_D3_K );

                VitalSetupHoldCheck (
                    TestSignal      => AddressIn,
                    TestSignalName  => "Address",
                    RefSignal       => KNegIn,
                    RefSignalName   => "KNeg",
                    SetupLow        => tsetup_A0_K,
                    HoldLow         => thold_A0_K,
                    CheckEnabled    => TRUE,
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_A0_KNeg,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_A0_KNeg );

                VitalSetupHoldCheck (
                    TestSignal      => AddressIn,
                    TestSignalName  => "Address",
                    RefSignal       => KIn,
                    RefSignalName   => "K",
                    SetupLow        => tsetup_A0_K,
                    HoldLow         => thold_A0_K,
                    CheckEnabled    => TRUE,
                    RefTransition   => '/',
                    HeaderMsg       => InstancePath & PartID,
                    TimingData      => TD_A0_K,
                    XOn             => XOn,
                    MsgOn           => MsgOn,
                    Violation       => Tviol_A0_K );

               VitalPeriodPulseCheck (
                    TestSignal      =>  CIn,
                    TestSignalName  =>  "C",
                    Period          =>  tperiod_K,
                    PulseWidthLow   =>  tpw_K_negedge,
                    PulseWidthHigh  =>  tpw_K_posedge,
                    PeriodData      =>  TD_C,
                    XOn             =>  XOn,
                    MsgOn           =>  MsgOn,
                    HeaderMsg       =>  InstancePath & PartID,
                    CheckEnabled    =>  (mode = c),
                    Violation       =>  Pviol_C );

               VitalPeriodPulseCheck (
                    TestSignal      =>  CNegIn,
                    TestSignalName  =>  "CNeg",
                    Period          =>  tperiod_K,
                    PulseWidthLow   =>  tpw_K_negedge,
                    PulseWidthHigh  =>  tpw_K_posedge,
                    PeriodData      =>  TD_CNeg,
                    XOn             =>  XOn,
                    MsgOn           =>  MsgOn,
                    HeaderMsg       =>  InstancePath & PartID,
                    CheckEnabled    =>  (mode = c),
                    Violation       =>  Pviol_CNeg );

               VitalPeriodPulseCheck (
                    TestSignal      =>  KIn,
                    TestSignalName  =>  "K",
                    Period          =>  tperiod_K,
                    PulseWidthLow   =>  tpw_K_negedge,
                    PulseWidthHigh  =>  tpw_K_posedge,
                    PeriodData      =>  TD_K,
                    XOn             =>  XOn,
                    MsgOn           =>  MsgOn,
                    HeaderMsg       =>  InstancePath & PartID,
                    CheckEnabled    =>  TRUE,
                    Violation       =>  Pviol_K );

               VitalPeriodPulseCheck (
                    TestSignal      =>  KNegIn,
                    TestSignalName  =>  "KNeg",
                    Period          =>  tperiod_K,
                    PulseWidthLow   =>  tpw_K_negedge,
                    PulseWidthHigh  =>  tpw_K_posedge,
                    PeriodData      =>  TD_KNeg,
                    XOn             =>  XOn,
                    MsgOn           =>  MsgOn,
                    HeaderMsg       =>  InstancePath & PartID,
                    CheckEnabled    =>  TRUE,
                    Violation       =>  Pviol_KNeg );

               VitalInPhaseSkewCheck (
                    Signal1         =>  KIn,
                    Signal2         =>  CIn,
                    SkewS1S2RiseRise => tskew_K_C,
                    SkewData        =>  SD_K_C,
                    CheckEnabled    =>  (mode = c),
                    Trigger         =>  KCTRIG,
                    Violation       =>  Sviol_K_C );

               VitalInPhaseSkewCheck (
                    Signal1         =>  KNegIn,
                    Signal2         =>  CNegIn,
                    SkewS1S2RiseRise => tskew_K_C,
                    SkewData        =>  SD_KNeg_CNeg,
                    CheckEnabled    =>  (mode = c),
                    Trigger         =>  KCTRIGN,
                    Violation       =>  Sviol_KNeg_CNeg );

               VitalOutPhaseSkewCheck (
                    Signal1         =>  KIn,
                    Signal2         =>  KNegIn,
                    SkewS1S2RiseFall => tskew_K_KNeg,
                    SkewS2S1RiseFall => tskew_KNeg_K,
                    SkewData        =>  SD_K_KNeg,
                    CheckEnabled    =>  TRUE,
                    Trigger         =>  KTRIG,
                    Violation       =>  Sviol_K_KNeg );

               VitalOutPhaseSkewCheck (
                    Signal1         =>  CIn,
                    Signal2         =>  CNegIn,
                    SkewS1S2RiseFall => tskew_K_KNeg,
                    SkewS2S1RiseFall => tskew_KNeg_K,
                    SkewData        =>  SD_C_CNeg,
                    CheckEnabled    =>  (mode = c),
                    Trigger         =>  CTRIG,
                    Violation       =>  Sviol_C_CNeg );

                Violation := Tviol_A0_K OR Tviol_A0_KNeg OR Tviol_D0_K OR
                             Tviol_D1_K OR Tviol_D2_K OR Tviol_D3_K OR
                             Tviol_D0_KNeg OR Tviol_D1_KNeg OR Tviol_D2_KNeg OR
                             Tviol_D3_KNeg OR Tviol_RNeg_K OR Tviol_WNeg_K OR
                             Tviol_BW0Neg_K OR Tviol_BW1Neg_K OR Tviol_BW2Neg_K
                             OR Tviol_BW3Neg_K OR Tviol_BW0Neg_KNeg OR
                             Tviol_BW1Neg_KNeg OR Tviol_BW2Neg_KNeg OR
                             Tviol_BW3Neg_KNeg OR Pviol_C OR Pviol_CNeg OR
                             Pviol_K OR Pviol_KNeg  OR
                             Sviol_KNeg_CNeg OR Sviol_K_C OR
                             Sviol_K_KNeg OR Sviol_C_CNeg;

            END IF; -- Timing Check Section

        --------------------------------------------------------------------
        -- Functional Section
        --------------------------------------------------------------------
        IF NOW < 10 ns  THEN
--            assert false report " start" severity note;
            IF To_UX01(CIn) = '1' AND To_UX01(CNegIn) = '1' THEN
                mode <= k;
            ELSE
                mode <= c;
            END IF;
            rdop:= false;
            wrop:= false;
        END IF;

        IF rising_edge(KIn) THEN
            IF WNeg_nwv = '0' THEN
                wrop := true;
                ASSERT (not(Is_X(BW0Neg_nwv)))
                    REPORT InstancePath & partID & ": Unusable value for BW0Neg"
                    SEVERITY SeverityMode;
                ASSERT (not(Is_X(BW1Neg_nwv)))
                    REPORT InstancePath & partID & ": Unusable value for BW1Neg"
                    SEVERITY SeverityMode;
                ASSERT (not(Is_X(BW2Neg_nwv)))
                    REPORT InstancePath & partID & ": Unusable value for BW2Neg"
                    SEVERITY SeverityMode;
                ASSERT (not(Is_X(BW3Neg_nwv)))
                    REPORT InstancePath & partID & ": Unusable value for BW3Neg"
                    SEVERITY SeverityMode;
                BW0Neg_reg := BW0Neg_nwv;
                BW1Neg_reg := BW1Neg_nwv;
                BW2Neg_reg := BW2Neg_nwv;
                BW3Neg_reg := BW3Neg_nwv;
                dat0_reg := Dat0In;
                dat1_reg := Dat1In;
                dat2_reg := Dat2In;
                dat3_reg := Dat3In;
            END IF;
            IF RNeg_nwv = '0' THEN
                rdop := true;
                raddr := To_Nat(AddressIn);
            END IF;
        END IF;

        IF rising_edge(KNegIn) THEN
            IF wrop = true THEN
                waddr := To_Nat(AddressIn);
                wrop := false;
                IF BW0Neg_reg = '0' THEN
                    IF Violation = '0' THEN
                        MemData0A(waddr) := To_Nat(dat0_reg);
                    ELSE
                        MemData0A(waddr) := -1;
                    END IF;
                END IF;
                IF BW0Neg_nwv = '0' THEN
                    IF Violation = '0' THEN
                        MemData0B(waddr) := To_Nat(Dat0In);
                    ELSE
                        MemData0B(waddr) := -1;
                    END IF;
                END IF;
                IF BW1Neg_reg = '0' THEN
                    IF Violation = '0' THEN
                        MemData1A(waddr) := To_Nat(dat1_reg);
                    ELSE
                        MemData1A(waddr) := -1;
                    END IF;
                END IF;
                IF BW1Neg_nwv = '0' THEN
                    IF Violation = '0' THEN
                        MemData1B(waddr) := To_Nat(Dat1In);
                    ELSE
                        MemData1B(waddr) := -1;
                    END IF;
                END IF;
                IF BW2Neg_reg = '0' THEN
                    IF Violation = '0' THEN
                        MemData2A(waddr) := To_Nat(dat2_reg);
                    ELSE
                        MemData2A(waddr) := -1;
                    END IF;
                END IF;
                IF BW2Neg_nwv = '0' THEN
                    IF Violation = '0' THEN
                        MemData2B(waddr) := To_Nat(Dat2In);
                    ELSE
                        MemData2B(waddr) := -1;
                    END IF;
                END IF;
                IF BW3Neg_reg = '0' THEN
                    IF Violation = '0' THEN
                        MemData3A(waddr) := To_Nat(dat3_reg);
                    ELSE
                        MemData3A(waddr) := -1;
                    END IF;
                END IF;
                IF BW3Neg_nwv = '0' THEN
                    IF Violation = '0' THEN
                        MemData3B(waddr) := To_Nat(Dat3In);
                    ELSE
                        MemData3B(waddr) := -1;
                    END IF;
                END IF;
            END IF;
        END IF;
        IF rising_edge(CNegInt)