📄 idt71124.ftm

📁 vhdl cod for ram.For sp3e
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<!DOCTYPE FTML SYSTEM "ftml.dtd"><FTML><HEAD><TITLE>FMF Timing for idt71124 Parts</TITLE><BODY><REVISION.HISTORY>version: |  author:  | mod date: | changes made:  V1.0    R. Munden    99 Dec 12   Initial release  V1.1    B. Bizic     01 JUN 12   Added 2 partnumbers  V1.2    R. Munden    02 MAR 06   Added 12 new part numbers</REVISION.HISTORY><TIMESCALE>1ns</TIMESCALE><MODEL>idt71124<FMFTIME>IDT71124S12Y<SOURCE>Integrated Device Technology DSC-3514/6 September 1999</SOURCE><COMMENT>Values are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:3:5) (0:4:6) (0:3:5) (0:4:6))    (IOPATH CENeg D0 () () (0:4:6) (3:8:12) (0:4:6) (3:8:12))    (IOPATH A0 D0 (4:8:12) (4:8:12))  ))  (TIMINGCHECK    (SETUP D0 WENeg (7:7:7))    (SETUP D0 CENeg (7:7:7))    (HOLD D0 WENeg (0:0:0))    (HOLD D0 CENeg (0:0:0))    (WIDTH (negedge WENeg) (10:10:10))  )</TIMING></FMFTIME><FMFTIME>IDT71124S15Y<SOURCE>Integrated Device Technology DSC-3514/6 September 1999</SOURCE><COMMENT>Values are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:3:5) (0:4:7) (0:3:5) (0:4:7))    (IOPATH CENeg D0 () () (0:4:7) (3:10:15) (0:4:7) (3:10:15))    (IOPATH A0 D0 (4:10:15) (4:10:15))  ))  (TIMINGCHECK    (SETUP D0 WENeg (8))    (SETUP D0 CENeg (8))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (12))  )</TIMING></FMFTIME><FMFTIME>IDT71124S20Y<SOURCE>Integrated Device Technology DSC-3514/6 September 1999</SOURCE><COMMENT>Values are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:4:7) (0:5:8) (0:4:7) (0:5:8))    (IOPATH CENeg D0 () () (0:5:8) (3:15:20) (0:5:8) (3:15:20))    (IOPATH A0 D0 (4:15:20) (4:15:20))  ))  (TIMINGCHECK    (SETUP D0 WENeg (9:9:9))    (SETUP D0 CENeg (9:9:9))    (HOLD D0 WENeg (0:0:0))    (HOLD D0 CENeg (0:0:0))    (WIDTH (negedge WENeg) (15:15:15))  )</TIMING></FMFTIME><FMFTIME>IDT71V124S15Y<SOURCE>Integrated Device Technology DSC-3484/05 August 2000</SOURCE><COMMENT>Values are for VCC=3.0V to 3.6V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>   (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:3:5) (0:4:7) (0:3:5) (0:4:7))    (IOPATH CENeg D0 () () (0:4:7) (3:10:15) (0:4:7) (3:10:15))    (IOPATH A0 D0 (4:10:15) (4:10:15))  ))  (TIMINGCHECK    (SETUP D0 WENeg (8:8:8))    (SETUP D0 CENeg (8:8:8))    (HOLD D0 WENeg (0:0:0))    (HOLD D0 CENeg (0:0:0))    (WIDTH (negedge WENeg) (12:12:12))  )</TIMING></FMFTIME><FMFTIME>IDT71V124S20Y<SOURCE>Integrated Device Technology DSC-3484/05 August 2000</SOURCE><COMMENT>Values are for VCC=3.0V to 3.6V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:4:7) (0:5:8) (0:4:7) (0:5:8))    (IOPATH CENeg D0 () () (0:5:8) (3:15:20) (0:5:8) (3:15:20))    (IOPATH A0 D0 (4:15:20) (4:15:20))  ))  (TIMINGCHECK    (SETUP D0 WENeg (9:9:9))    (SETUP D0 CENeg (9:9:9))    (HOLD D0 WENeg (0:0:0))    (HOLD D0 CENeg (0:0:0))    (WIDTH (negedge WENeg) (15:15:15))  )</TIMING></FMFTIME><FMFTIME>IDT71V124SA10PH<SOURCE>Integrated Device Technology DSC-3873/06 August 2001</SOURCE>IDT71V124SA10TY<SOURCE>Integrated Device Technology DSC-3873/06 August 2001</SOURCE>IDT71V124SA10Y<SOURCE>Integrated Device Technology DSC-3873/06 August 2001</SOURCE><COMMENT>Values are for VCC=3.15V to 3.6V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:2:5) (0:2:5) (0:2:5) (0:2:5))    (IOPATH CENeg D0 () () (0:3:5) (4:7:10) (0:3:5) (4:7:10))    (IOPATH A0 D0 (3:6:10) (3:6:10))  ))  (TIMINGCHECK    (SETUP D0 WENeg (5:5:5))    (SETUP D0 CENeg (5:5:5))    (HOLD D0 WENeg (0:0:0))    (HOLD D0 CENeg (0:0:0))    (WIDTH (negedge WENeg) (7:7:7))  )</TIMING></FMFTIME><FMFTIME>IDT71V124SA12PH<SOURCE>Integrated Device Technology DSC-3873/06 August 2001</SOURCE>IDT71V124SA12TY<SOURCE>Integrated Device Technology DSC-3873/06 August 2001</SOURCE>IDT71V124SA12Y<SOURCE>Integrated Device Technology DSC-3873/06 August 2001</SOURCE><COMMENT>Values are for VCC=3.15V to 3.6V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:3:5) (0:4:6) (0:3:5) (0:4:6))    (IOPATH CENeg D0 () () (0:4:6) (4:8:12) (0:4:6) (4:8:12))    (IOPATH A0 D0 (4:8:12) (4:8:12))  ))  (TIMINGCHECK    (SETUP D0 WENeg (6:6:6))    (SETUP D0 CENeg (6:6:6))    (HOLD D0 WENeg (0:0:0))    (HOLD D0 CENeg (0:0:0))    (WIDTH (negedge WENeg) (8:8:8))  )</TIMING></FMFTIME><FMFTIME>IDT71V124SA15PH<SOURCE>Integrated Device Technology DSC-3873/06 August 2001</SOURCE>IDT71V124SA15TY<SOURCE>Integrated Device Technology DSC-3873/06 August 2001</SOURCE>IDT71V124SA15Y<SOURCE>Integrated Device Technology DSC-3873/06 August 2001</SOURCE><COMMENT>Values are for VCC=3.15V to 3.6V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:3:5) (0:4:7) (0:3:5) (0:4:7))    (IOPATH CENeg D0 () () (0:4:7) (4:10:15) (0:4:7) (4:10:15))    (IOPATH A0 D0 (5:10:15) (5:10:15))  ))  (TIMINGCHECK    (SETUP D0 WENeg (7:7:7))    (SETUP D0 CENeg (7:7:7))    (HOLD D0 WENeg (0:0:0))    (HOLD D0 CENeg (0:0:0))    (WIDTH (negedge WENeg) (10:10:10))  )</TIMING></FMFTIME><FMFTIME>IDT71V124SA20PH<SOURCE>Integrated Device Technology DSC-3873/06 August 2001</SOURCE>IDT71V124SA20TY<SOURCE>Integrated Device Technology DSC-3873/06 August 2001</SOURCE>IDT71V124SA20Y<SOURCE>Integrated Device Technology DSC-3873/06 August 2001</SOURCE><COMMENT>Values are for VCC=3.15V to 3.6V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:4:7) (0:5:8) (0:4:7) (0:5:8))    (IOPATH CENeg D0 () () (0:5:8) (4:14:20) (0:5:8) (4:14:20))    (IOPATH A0 D0 (7:14:20) (7:14:20))  ))  (TIMINGCHECK    (SETUP D0 WENeg (9:9:9))    (SETUP D0 CENeg (9:9:9))    (HOLD D0 WENeg (0:0:0))    (HOLD D0 CENeg (0:0:0))    (WIDTH (negedge WENeg) (12:12:12))  )</TIMING></FMFTIME><FMFTIME>MCM6726DWJ8<SOURCE>Motorola Semiconductor MCM6726D/D 10/9/96</SOURCE><COMMENT>Values are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:3:4) (0:3:4) (0:3:4) (0:3:4))    (IOPATH CENeg D0 () () (0:3:4) (3:6:8) (0:3:4) (3:6:8))    (IOPATH A0 D0 (3:6:8) (3:6:8))  ))  (TIMINGCHECK    (SETUP D0 WENeg (4))    (SETUP D0 CENeg (4))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (8))  )</TIMING></FMFTIME><FMFTIME>MCM6726DWJ10<SOURCE>Motorola Semiconductor MCM6726D/D 10/9/96</SOURCE><COMMENT>Values are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:4:5) (0:4:5) (0:4:5) (0:4:5))    (IOPATH CENeg D0 () () (0:4:5) (3:7:10) (0:4:5) (3:7:10))    (IOPATH A0 D0 (3:7:10) (3:7:10))  ))  (TIMINGCHECK    (SETUP D0 WENeg (5))    (SETUP D0 CENeg (5))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (9))  )</TIMING></FMFTIME><FMFTIME>MCM6726DWJ12<SOURCE>Motorola Semiconductor MCM6726D/D 10/9/96</SOURCE><COMMENT>Values are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:4:6) (0:4:6) (0:4:6) (0:4:6))    (IOPATH CENeg D0 () () (0:4:6) (3:8:12) (0:4:6) (3:8:12))    (IOPATH A0 D0 (3:8:12) (3:8:12))  ))  (TIMINGCHECK    (SETUP D0 WENeg (6))    (SETUP D0 CENeg (6))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (10))  )</TIMING></FMFTIME><FMFTIME>KM681002AJ-12<SOURCE>Samsung Electronics data sheet rev 4 February 1998</SOURCE>KM681002AT-12<SOURCE>Samsung Electronics data sheet rev 4 February 1998</SOURCE><COMMENT>Values are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:4:6) (0:4:6) (0:4:6) (0:4:6))    (IOPATH CENeg D0 () () (0:4:6) (3:8:12) (0:4:6) (3:8:12))    (IOPATH A0 D0 (3:8:12) (3:8:12))  ))  (TIMINGCHECK    (SETUP D0 WENeg (6))    (SETUP D0 CENeg (6))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (12))  )</TIMING></FMFTIME><FMFTIME>KM681002AJ-15<SOURCE>Samsung Electronics data sheet rev 4 February 1998</SOURCE>KM681002AT-15<SOURCE>Samsung Electronics data sheet rev 4 February 1998</SOURCE><COMMENT>Values are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:4:7) (0:4:7) (0:4:7) (0:4:7))    (IOPATH CENeg D0 () () (0:4:7) (3:10:15) (0:4:7) (3:10:15))    (IOPATH A0 D0 (3:10:15) (3:10:15))  ))  (TIMINGCHECK    (SETUP D0 WENeg (7))    (SETUP D0 CENeg (7))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (15))  )</TIMING></FMFTIME><FMFTIME>KM681002AJ-20<SOURCE>Samsung Electronics data sheet rev 4 February 1998</SOURCE>KM681002AT-20<SOURCE>Samsung Electronics data sheet rev 4 February 1998</SOURCE><COMMENT>Values are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:5:9) (0:5:9) (0:5:9) (0:5:9))    (IOPATH CENeg D0 () () (0:5:9) (3:15:20) (0:5:9) (3:15:20))    (IOPATH A0 D0 (3:15:20) (3:15:20))  ))  (TIMINGCHECK    (SETUP D0 WENeg (9))    (SETUP D0 CENeg (9))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (20))  )</TIMING></FMFTIME><FMFTIME>TC558128BJ-12<SOURCE>Toshiba data sheet 1998-11-19</SOURCE>TC558128BFT-12<SOURCE>Toshiba data sheet 1998-11-19</SOURCE><COMMENT>Values are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:4:6) (1:4:6) (0:4:6) (1:4:6))    (IOPATH CENeg D0 () () (0:4:6) (5:9:12) (0:4:6) (5:9:12))    (IOPATH A0 D0 (5:9:12) (5:9:12))  ))  (TIMINGCHECK    (SETUP D0 WENeg (6))    (SETUP D0 CENeg (6))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (8))  )</TIMING></FMFTIME><FMFTIME>TC558128BJ-15<SOURCE>Toshiba data sheet 1998-11-19</SOURCE>TC558128BFT-15<SOURCE>Toshiba data sheet 1998-11-19</SOURCE><COMMENT>Values are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH OENeg D0 () () (0:5:8) (1:5:8) (0:5:8) (1:5:8))    (IOPATH CENeg D0 () () (0:5:8) (5:10:15) (0:5:8) (5:10:15))    (IOPATH A0 D0 (5:10:15) (5:10:15))  ))  (TIMINGCHECK    (SETUP D0 WENeg (8))    (SETUP D0 CENeg (8))    (HOLD D0 WENeg (0))    (HOLD D0 CENeg (0))    (WIDTH (negedge WENeg) (9))  )</TIMING></FMFTIME></BODY></FTML>
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