📄 k7a163600a.ftm

📁 vhdl cod for ram.For sp3e
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 <!DOCTYPE FTML SYSTEM "ftml.dtd"><FTML><HEAD><TITLE>FMF Timing for k7a163600a, cy7c1380c Parts</TITLE><BODY><REVISION.HISTORY>version: |  author:         | mod date: | changes made:  V1.0    D.Randjelovic       05 Oct 28   Initial release</REVISION.HISTORY><TIMESCALE>1ns</TIMESCALE><MODEL>k7a163600a<FMFTIME>K7A163600A-QC25<SOURCE>Samsung Electronics Datasheet K7A163600A K7A161800A Rev 3.0, Nov. 17,2003</SOURCE>K7A163600A-QI25<SOURCE>Samsung Electronics Datasheet K7A163600A K7A161800A Rev 3.0, Nov. 17,2003</SOURCE><COMMENT>The values listed are for Vdd=3.135V to 3.465V, Ta=0 to +70 Celsius</COMMENT><COMMENT>The values listed are also guaranteed at industrial temperature range</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH CLK DQA0 (0.9:1.8:2.6) (0.9:1.8:2.6) (1.5:2:2.6) (0.9:1.8:2.6) (1.5:2:2.6) (0.9:1.8:2.6))    (IOPATH CLK DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0))    (IOPATH OENeg DQA0 ()()(0.9:1.8:2.6) (0.9:1.8:2.6)(0.9:1.8:2.6)(0.9:1.8:2.6))    (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0))  ))  (TIMINGCHECK    (PERIOD (posedge CLK) (4.0))    (WIDTH (posedge CLK)(1.7))    (WIDTH (negedge CLK)(1.7))    (SETUP A0 CLK (1.2))    (SETUP DQA0 CLK (1.2))    (SETUP ADVNeg CLK (1.2))    (SETUP ADSCNeg CLK (1.2))    (SETUP WEANeg CLK (1.2))    (SETUP CS2 CLK (1.2))    (HOLD A0 CLK (0.3))    (HOLD DQA0 CLK (0.3))    (HOLD ADSCNeg CLK (0.3))    (HOLD WEANeg CLK (0.3))    (HOLD ADVNeg CLK (0.3))    (HOLD CS2 CLK (0.3))  ))  (CELL (CELLTYPE "VITALbuf")    (INSTANCE %LABEL%/TPOW)  (DELAY (ABSOLUTE (DEVICE(1000000:1000000:1000000))))</TIMING></FMFTIME><FMFTIME>K7A163600A-QC16<SOURCE>Samsung Electronics Datasheet K7A163600A K7A161800A Rev 3.0, Nov. 17,2003</SOURCE>K7A163600A-QI16<SOURCE>Samsung Electronics Datasheet K7A163600A K7A161800A Rev 3.0, Nov. 17,2003</SOURCE><COMMENT>The values listed are for Vdd=3.135V to 3.465V, Ta=0 to +70 Celsius</COMMENT><COMMENT>The values listed are also guaranteed at industrial temperature range</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH CLK DQA0 (1.2:2.4:3.5) (1.2:2.4:3.5) (1.5:2.3:3) (1.2:2.4:3.5) (1.5:2.3:3) (1.2:2.4:3.5))    (IOPATH CLK DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0))    (IOPATH OENeg DQA0 ()()(1:2:3) (1.2:2.4:3.5)(1:2:3)(1.2:2.4:3.5))    (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0))  ))  (TIMINGCHECK    (PERIOD (posedge CLK) (6.0))    (WIDTH (posedge CLK)(2.1))    (WIDTH (negedge CLK)(2.1))    (SETUP A0 CLK (1.5))    (SETUP DQA0 CLK (1.5))    (SETUP ADVNeg CLK (1.5))    (SETUP ADSCNeg CLK (1.5))    (SETUP WEANeg CLK (1.5))    (SETUP CS2 CLK (1.5))    (HOLD A0 CLK (0.5))    (HOLD DQA0 CLK (0.5))    (HOLD ADSCNeg CLK (0.5))    (HOLD WEANeg CLK (0.5))    (HOLD ADVNeg CLK (0.5))    (HOLD CS2 CLK (0.5))  ))  (CELL (CELLTYPE "VITALbuf")    (INSTANCE %LABEL%/TPOW)  (DELAY (ABSOLUTE (DEVICE(1000000:1000000:1000000))))</TIMING></FMFTIME><FMFTIME>K7A163600A-QC14<SOURCE>Samsung Electronics Datasheet K7A163600A K7A161800A Rev 3.0, Nov. 17,2003</SOURCE>K7A163600A-QI14<SOURCE>Samsung Electronics Datasheet K7A163600A K7A161800A Rev 3.0, Nov. 17,2003</SOURCE><COMMENT>The values listed are for Vdd=3.135V to 3.465V, Ta=0 to +70 Celsius</COMMENT><COMMENT>The values listed are also guaranteed at industrial temperature range</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH CLK DQA0 (1.4:2.8:4) (1.4:2.8:4) (1.5:2.5:3.5) (1.4:2.8:4) (1.5:2.5:3.5) (1.4:2.8:4))    (IOPATH CLK DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0))    (IOPATH OENeg DQA0 ()()(1.5:2.5:3.5) (1.4:2.8:4)(1.5:2.5:3.5)(1.4:2.8:4))    (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0))  ))  (TIMINGCHECK    (PERIOD (posedge CLK) (7.2))    (WIDTH (posedge CLK)(2.5))    (WIDTH (negedge CLK)(2.5))    (SETUP A0 CLK (1.5))    (SETUP DQA0 CLK (1.5))    (SETUP ADVNeg CLK (1.5))    (SETUP ADSCNeg CLK (1.5))    (SETUP WEANeg CLK (1.5))    (SETUP CS2 CLK (1.5))    (HOLD A0 CLK (0.5))    (HOLD DQA0 CLK (0.5))    (HOLD ADSCNeg CLK (0.5))    (HOLD WEANeg CLK (0.5))    (HOLD ADVNeg CLK (0.5))    (HOLD CS2 CLK (0.5))  ))  (CELL (CELLTYPE "VITALbuf")    (INSTANCE %LABEL%/TPOW)  (DELAY (ABSOLUTE (DEVICE(1000000:1000000:1000000))))</TIMING></FMFTIME><FMFTIME>CY7C1380C-250AC<SOURCE>Cypress 38-05237 Rev. *D Revised Feb. 13,2004</SOURCE>CY7C1380C-250BGC<SOURCE>Cypress 38-05237 Rev. *D Revised Feb. 13,2004</SOURCE>CY7C1380C-250BZC<SOURCE>Cypress 38-05237 Rev. *D Revised Feb. 13,2004</SOURCE><COMMENT>The values listed are for Vdd=3.135V to 3.6V, Ta= +25 Celsius</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH CLK DQA0 (1:1.8:2.6) (1:1.8:2.6) (1:1.8:2.6) (1:1.8:2.6) (1:1.8:2.6) (1:1.8:2.6))    (IOPATH CLK DQA1 (1:1:1) (1:1:1) (1:1:1) (1:1:1) (1:1:1) (1:1:1))    (IOPATH OENeg DQA0 ()()(1:1.8:2.6) (1:1.8:2.6)(1:1.8:2.6)(1:1.8:2.6))    (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0))  ))  (TIMINGCHECK    (PERIOD (posedge CLK) (4.0))    (WIDTH (posedge CLK)(1.7))    (WIDTH (negedge CLK)(1.7))    (SETUP A0 CLK (1.2))    (SETUP DQA0 CLK (1.2))    (SETUP ADVNeg CLK (1.2))    (SETUP ADSCNeg CLK (1.2))    (SETUP WEANeg CLK (1.2))    (SETUP CS2 CLK (1.2))    (HOLD A0 CLK (0.3))    (HOLD DQA0 CLK (1.0))    (HOLD ADSCNeg CLK (0.3))    (HOLD WEANeg CLK (0.3))    (HOLD ADVNeg CLK (0.3))    (HOLD CS2 CLK (0.3))  ))  (CELL (CELLTYPE "VITALbuf")    (INSTANCE %LABEL%/TPOW)  (DELAY (ABSOLUTE (DEVICE(1000000:1000000:1000000))))</TIMING></FMFTIME><FMFTIME>CY7C1380C-225AC<SOURCE>Cypress 38-05237 Rev. *D Revised Feb. 13,2004</SOURCE>CY7C1380C-225BGC<SOURCE>Cypress 38-05237 Rev. *D Revised Feb. 13,2004</SOURCE>CY7C1380C-225BZC<SOURCE>Cypress 38-05237 Rev. *D Revised Feb. 13,2004</SOURCE><COMMENT>The values listed are for Vdd=3.135V to 3.6V, Ta= +25 Celsius</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH CLK DQA0 (1:1.8:2.8) (1:1.8:2.8) (1:1.8:2.8) (1:1.8:2.8) (1:1.8:2.8) (1:1.8:2.8))    (IOPATH CLK DQA1 (1:1:1) (1:1:1) (1:1:1) (1:1:1) (1:1:1) (1:1:1))    (IOPATH OENeg DQA0 ()()(1:1.8:2.8) (1:1.8:2.8)(1:1.8:2.8)(1:1.8:2.8))    (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0))  ))  (TIMINGCHECK    (PERIOD (posedge CLK) (4.4))    (WIDTH (posedge CLK)(2.0))    (WIDTH (negedge CLK)(2.0))    (SETUP A0 CLK (1.4))    (SETUP DQA0 CLK (1.4))    (SETUP ADVNeg CLK (1.4))    (SETUP ADSCNeg CLK (1.4))    (SETUP WEANeg CLK (1.4))    (SETUP CS2 CLK (1.4))    (HOLD A0 CLK (0.4))    (HOLD DQA0 CLK (1.0))    (HOLD ADSCNeg CLK (0.4))    (HOLD WEANeg CLK (0.4))    (HOLD ADVNeg CLK (0.4))    (HOLD CS2 CLK (0.4))  ))  (CELL (CELLTYPE "VITALbuf")    (INSTANCE %LABEL%/TPOW)  (DELAY (ABSOLUTE (DEVICE(1000000:1000000:1000000))))</TIMING></FMFTIME><FMFTIME>CY7C1380C-200AC<SOURCE>Cypress 38-05237 Rev. *D Revised Feb. 13,2004</SOURCE>CY7C1380C-200BGC<SOURCE>Cypress 38-05237 Rev. *D Revised Feb. 13,2004</SOURCE>CY7C1380C-200BZC<SOURCE>Cypress 38-05237 Rev. *D Revised Feb. 13,2004</SOURCE><COMMENT>The values listed are for Vdd=3.135V to 3.6V, Ta= +25 Celsius</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH CLK DQA0 (1.3:2:3) (1.3:2:3) (1.3:2:3) (1.3:2:3) (1.3:2:3) (1.3:2:3))    (IOPATH CLK DQA1 (1.3:1.3:1.3) (1.3:1.3:1.3) (1.3:1.3:1.3) (1.3:1.3:1.3) (1.3:1.3:1.3) (1.3:1.3:1.3))    (IOPATH OENeg DQA0 ()()(1.3:2:3) (1.3:2:3)(1.3:2:3)(1.3:2:3))    (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0))  ))  (TIMINGCHECK    (PERIOD (posedge CLK) (5))    (WIDTH (posedge CLK)(2.0))    (WIDTH (negedge CLK)(2.0))    (SETUP A0 CLK (1.4))    (SETUP DQA0 CLK (1.4))    (SETUP ADVNeg CLK (1.4))    (SETUP ADSCNeg CLK (1.4))    (SETUP WEANeg CLK (1.4))    (SETUP CS2 CLK (1.4))    (HOLD A0 CLK (0.4))    (HOLD DQA0 CLK (1.3))    (HOLD ADSCNeg CLK (0.4))    (HOLD WEANeg CLK (0.4))    (HOLD ADVNeg CLK (0.4))    (HOLD CS2 CLK (0.4))  ))  (CELL (CELLTYPE "VITALbuf")    (INSTANCE %LABEL%/TPOW)  (DELAY (ABSOLUTE (DEVICE(1000000:1000000:1000000))))</TIMING></FMFTIME><FMFTIME>CY7C1380C-167AC<SOURCE>Cypress 38-05237 Rev. *D Revised Feb. 13,2004</SOURCE>CY7C1380C-167BGC<SOURCE>Cypress 38-05237 Rev. *D Revised Feb. 13,2004</SOURCE>CY7C1380C-167BZC<SOURCE>Cypress 38-05237 Rev. *D Revised Feb. 13,2004</SOURCE><COMMENT>The values listed are for Vdd=3.135V to 3.6V, Ta= +25 Celsius</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH CLK DQA0 (1.3:2.5:3.4) (1.3:2.5:3.4) (1.3:2.5:3.4) (1.3:2.5:3.4) (1.3:2.5:3.4) (1.3:2.5:3.4))    (IOPATH CLK DQA1 (1.3:1.3:1.3) (1.3:1.3:1.3) (1.3:1.3:1.3) (1.3:1.3:1.3) (1.3:1.3:1.3) (1.3:1.3:1.3))    (IOPATH OENeg DQA0 ()()(1.3:2.5:3.4) (1.3:2.5:3.4)(1.3:2.5:3.4)(1.3:2.5:3.4))    (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0))  ))  (TIMINGCHECK    (PERIOD (posedge CLK) (6))    (WIDTH (posedge CLK)(2.2))    (WIDTH (negedge CLK)(2.2))    (SETUP A0 CLK (1.5))    (SETUP DQA0 CLK (1.5))    (SETUP ADVNeg CLK (1.5))    (SETUP ADSCNeg CLK (1.5))    (SETUP WEANeg CLK (1.5))    (SETUP CS2 CLK (1.5))    (HOLD A0 CLK (0.5))    (HOLD DQA0 CLK (1.3))    (HOLD ADSCNeg CLK (0.5))    (HOLD WEANeg CLK (0.5))    (HOLD ADVNeg CLK (0.5))    (HOLD CS2 CLK (0.5))  ))  (CELL (CELLTYPE "VITALbuf")    (INSTANCE %LABEL%/TPOW)  (DELAY (ABSOLUTE (DEVICE(1000000:1000000:1000000))))</TIMING></FMFTIME><FMFTIME>CY7C1380C-133AC<SOURCE>Cypress 38-05237 Rev. *D Revised Feb. 13,2004</SOURCE>CY7C1380C-133BGC<SOURCE>Cypress 38-05237 Rev. *D Revised Feb. 13,2004</SOURCE>CY7C1380C-133BZC<SOURCE>Cypress 38-05237 Rev. *D Revised Feb. 13,2004</SOURCE><COMMENT>The values listed are for Vdd=3.135V to 3.6V, Ta= +25 Celsius</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH CLK DQA0 (1.4:2.8:4.2) (1.4:2.8:4.2) (1.3:2.5:3.4) (1.4:2.8:4.2) (1.3:2.5:3.4) (1.4:2.8:4.2))    (IOPATH CLK DQA1 (1.3:1.3:1.3) (1.3:1.3:1.3) (1.3:1.3:1.3) (1.3:1.3:1.3) (1.3:1.3:1.3) (1.3:1.3:1.3))    (IOPATH OENeg DQA0 ()()(1.3:2.6:4.0) (1.4:2.8:4.2)(1.3:2.6:4.0)(1.4:2.8:4.2))    (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0))  ))  (TIMINGCHECK    (PERIOD (posedge CLK) (7.5))    (WIDTH (posedge CLK)(2.5))    (WIDTH (negedge CLK)(2.5))    (SETUP A0 CLK (1.5))    (SETUP DQA0 CLK (1.5))    (SETUP ADVNeg CLK (1.5))    (SETUP ADSCNeg CLK (1.5))    (SETUP WEANeg CLK (1.5))    (SETUP CS2 CLK (1.5))    (HOLD A0 CLK (0.5))    (HOLD DQA0 CLK (1.3))    (HOLD ADSCNeg CLK (0.5))    (HOLD WEANeg CLK (0.5))    (HOLD ADVNeg CLK (0.5))    (HOLD CS2 CLK (0.5))  ))  (CELL (CELLTYPE "VITALbuf")    (INSTANCE %LABEL%/TPOW)  (DELAY (ABSOLUTE (DEVICE(1000000:1000000:1000000))))</TIMING></FMFTIME></BODY></FTML>
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