📄 mt48lc4m32b2.ftm
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<!DOCTYPE FTML SYSTEM "ftml.dtd"><FTML><HEAD><TITLE>FMF Timing for mt48lc4m32b2 Parts</TITLE><REVISION.HISTORY>version: | author: | mod date: | changes made: V1.0 I.Milutinovic 06 Apr 18 Initial release</REVISION.HISTORY></HEAD><BODY><TIMESCALE>1ns</TIMESCALE><MODEL>mt48lc4m32b2<FMFTIME>MT48LC4M32B2TG-6<SOURCE>Micron 128Mb SDRAM x32_1.fm - Rev. H 8/05 EN, 2001 Micron Technology, Inc.</SOURCE>MT48LC4M32B2P-6<SOURCE> Micron 128Mb SDRAM x32_1.fm - Rev. H 8/05 EN, 2001 Micron Technology, Inc.</SOURCE>MT48LC4M32B2F5-6<SOURCE>Micron 128Mb SDRAM x32_1.fm - Rev. H 8/05 EN, 2001 Micron Technology, Inc.</SOURCE>MT48LC4M32B2B5-6<SOURCE>Micron 128Mb SDRAM x32_1.fm - Rev. H 8/05 EN, 2001 Micron Technology, Inc.</SOURCE><COMMENT> The values listed are for VDD=3V to 3.6V, CL=30pF, Ta=0 to +70 Celsius</COMMENT><COMMENT> Minimal and Typical values are derived</COMMENT><TIMING> (DELAY (ABSOLUTE (IOPATH CLK DQ1 (5.7:11.3:17)(5.7:11.3:17)(5.7:11.3:17)(5.7:11.3:17)(5.7:11.3:17)(5.7:11.3:17)) (IOPATH CLK DQ2 (2.5:5:7.5)(2.5:5:7.5)(2.5:5:7.5)(2.5:5:7.5)(2.5:5:7.5)(2.5:5:7.5)) (IOPATH CLK DQ3 (1.8:3.6:5.5)(1.8:3.6:5.5)(1.8:3.6:5.5)(1.8:3.6:5.5)(1.8:3.6:5.5)(1.8:3.6:5.5)) )) (TIMINGCHECK (SETUP DQ0 CLK (1.5)) (HOLD DQ0 CLK (1)) (WIDTH (posedge CLK) (2.5)) (WIDTH (negedge CLK) (2.5)) (PERIOD (COND (cl2 == 1) (posedge CLK)) (6)) (PERIOD (COND (cl1 == 1) (posedge CLK)) (10)) (PERIOD (COND (cl0 == 1) (posedge CLK)) (20)) )) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/TRAS) (DELAY (ABSOLUTE(DEVICE (42)(120000))))) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/TRC) (DELAY (ABSOLUTE(DEVICE (60))))) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/TRCAR)(DELAY (ABSOLUTE(DEVICE (60))))) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/TRCD) (DELAY (ABSOLUTE(DEVICE (18))))) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/REF) (DELAY (ABSOLUTE(DEVICE (15625))))) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/TRP) (DELAY (ABSOLUTE(DEVICE (18))))) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/TWR) (DELAY (ABSOLUTE(DEVICE (12))))</TIMING></FMFTIME><FMFTIME>MT48LC4M32B2TG-7<SOURCE>Micron 128Mb SDRAM x32_1.fm - Rev. H 8/05 EN, 2001 Micron Technology, Inc.</SOURCE>MT48LC4M32B2P-7<SOURCE> Micron 128Mb SDRAM x32_1.fm - Rev. H 8/05 EN, 2001 Micron Technology, Inc.</SOURCE>MT48LC4M32B2F5-7<SOURCE>Micron 128Mb SDRAM x32_1.fm - Rev. H 8/05 EN, 2001 Micron Technology, Inc.</SOURCE>MT48LC4M32B2B5-7<SOURCE>Micron 128Mb SDRAM x32_1.fm - Rev. H 8/05 EN, 2001 Micron Technology, Inc.</SOURCE><COMMENT> The values listed are for VDD=3V to 3.6V, CL=50pF, Ta=0 to +70 Celsius</COMMENT><COMMENT> Minimal and Typical values are derived</COMMENT><TIMING> (DELAY (ABSOLUTE (IOPATH CLK DQ1 (5.7:11.3:17)(5.7:11.3:17)(5.7:11.3:17)(5.7:11.3:17)(5.7:11.3:17)(5.7:11.3:17)) (IOPATH CLK DQ2 (2.7:5.3:8)(2.7:5.3:8)(2.7:5.3:8)(2.7:5.3:8)(2.5:5:8)(2.7:5.3:8)) (IOPATH CLK DQ3 (1.8:3.6:5.5)(1.8:3.6:5.5)(1.8:3.6:5.5)(1.8:3.6:5.5)(1.8:3.6:5.5)(1.8:3.6:5.5)) )) (TIMINGCHECK (SETUP DQ0 CLK (2)) (HOLD DQ0 CLK (1)) (WIDTH (posedge CLK) (2.75)) (WIDTH (negedge CLK) (2.75)) (PERIOD (COND (cl2 == 1) (posedge CLK)) (7)) (PERIOD (COND (cl1 == 1) (posedge CLK)) (10)) (PERIOD (COND (cl0 == 1) (posedge CLK)) (20)) )) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/TRAS) (DELAY (ABSOLUTE(DEVICE (42)(120000))))) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/TRC) (DELAY (ABSOLUTE(DEVICE (70))))) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/TRCAR)(DELAY (ABSOLUTE(DEVICE (70))))) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/TRCD) (DELAY (ABSOLUTE(DEVICE (20))))) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/REF) (DELAY (ABSOLUTE(DEVICE (15625))))) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/TRP) (DELAY (ABSOLUTE(DEVICE (20))))) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/TWR) (DELAY (ABSOLUTE(DEVICE (14))))</TIMING></FMFTIME></BODY></FTML>⌨️ 快捷键说明
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