📄 mt48lc8m8.vhd
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WHEN pwron => IF (PoweredUp = false) THEN ASSERT (command = nop) REPORT InstancePath & partID & BankString &": Only NOPs allowed" & " during power up." SEVERITY SeverityMode; DataDrive := (OTHERS => 'Z'); ELSIF (command = pre) AND ((cur_bank = bank) OR (AddressIn(10) = '1')) THEN statebank(bank) <= precharge, idle AFTER tdevice_TRP; END IF; WHEN precharge => IF cur_bank = bank THEN -- It is only an error if this bank is selected ASSERT (command = nop OR command = pre) REPORT InstancePath & partID & BankString &": Illegal command received" & " during precharge." SEVERITY SeverityMode; END IF; WHEN idle => IF (command = nop OR command = bst OR command = pre) OR (cur_bank /= bank) THEN null; ELSIF (command = mrs) THEN IF (statebank = idle & idle & idle & idle) THEN ModeReg := AddressIn; statebank <= mode_set & mode_set & mode_set & mode_set; END IF; ELSIF (command = ref) THEN IF (statebank = idle & idle & idle & idle) THEN IF (CKEIn = '1') THEN statebank(bank) <= auto_refresh, idle AFTER tdevice_TRFC; ELSE statebank(bank) <= self_refresh; END IF; END IF; ELSIF (command = act) THEN statebank(bank) <= bank_act; ras_in(bank) <= '1', '0' AFTER 70 ns; rct_in <= '1', '0' AFTER 10 ps; rcdt_in(bank) <= '1', '0' AFTER 10 ps; MemAddr(bank)(HiAddrBit+HiColBit+1 downto HiColBit +1) := AddressIn; -- latch row addr ELSE -- IF cur_bank = bank THEN ASSERT false REPORT InstancePath & partID & ": Illegal command" & " received in idle state." SEVERITY SeverityMode; END IF; WHEN mode_set => statebank <= idle & idle & idle & idle; ASSERT (ModeReg(7) = '0')-- AND ModeReg(8) ='0') REPORT InstancePath & partID & BankString &": Illegal operating mode set." SEVERITY SeverityMode; ASSERT command = nop REPORT InstancePath & partID & BankString & ": Illegal command received during mode_set." SEVERITY SeverityMode; -- read burst length IF (ModeReg(2 downto 0) = "000") THEN Burst_Length := 1; Burst_Bits := 0; ELSIF (ModeReg(2 downto 0) = "001") THEN Burst_Length := 2; Burst_Bits := 1; ELSIF (ModeReg(2 downto 0) = "010") THEN Burst_Length := 4; Burst_Bits := 2; ELSIF (ModeReg(2 downto 0) = "011") THEN Burst_Length := 8; Burst_Bits := 3; ELSE ASSERT false REPORT InstancePath & partID & BankString &": Invalid burst length specified." SEVERITY SeverityMode; END IF; -- read burst type IF (ModeReg(3) = '0') THEN Burst := sequential; ELSIF (ModeReg(3) = '1') THEN Burst := interleave; ELSE ASSERT false REPORT InstancePath & partID & BankString &": Invalid burst type specified." SEVERITY SeverityMode; END IF; -- read CAS latency IF (ModeReg(6 downto 4) = "010") THEN CAS_Lat <= 2; ASSERT TimingModel(16) /= '6' REPORT "CAS Latency 2 is NOT allowed for this "& "TimingModel" SEVERITY warning; ELSIF (ModeReg(6 downto 4) = "110") THEN CAS_Lat <= 3; ELSE ASSERT false REPORT InstancePath & partID & BankString & ": CAS Latency set incorrecty " SEVERITY SeverityMode; END IF; -- read write burst mode IF (ModeReg(9) = '0') THEN WB := programmed; ELSIF (ModeReg(9) = '1') THEN WB := single; ELSE ASSERT false REPORT InstancePath & partID & BankString & ": Invalid burst type specified." SEVERITY SeverityMode; END IF; WHEN auto_refresh => IF (Ref_Cnt < 8192) THEN Ref_Cnt := Ref_Cnt + 1; END IF; ASSERT command = nop REPORT InstancePath & partID & BankString & ": Illegal command received during auto_refresh." SEVERITY SeverityMode; WHEN bank_act => IF (command = pre) AND ((cur_bank = bank) OR (AddressIn(10) = '1')) THEN ASSERT ras_out(bank) = '1' REPORT InstancePath & partID & BankString & ": precharge command" & " does not meet tRAS time." SEVERITY SeverityMode; statebank(bank) <= precharge, idle AFTER tdevice_TRP; ELSIF (command = nop OR command = bst) OR (cur_bank /= bank) THEN null; ELSIF (command = read) THEN ASSERT rcdt_out(bank) = '0' REPORT InstancePath & partID & BankString & ": read command received too soon after active." SEVERITY SeverityMode; ASSERT ((AddressIn(10) = '0') OR (AddressIn(10) = '1')) REPORT InstancePath & partID & BankString & ": AddressIn(10) = X" & " during read command. Next state unknown." SEVERITY SeverityMode; FixColumnAddress(bank); ReadFromMem(bank); Burst_Cnt(bank) := 1; IF (AddressIn(10) = '0') THEN statebank(bank) <= read; ELSIF (AddressIn(10) = '1') THEN statebank(bank) <= read_auto_pre; END IF; ELSIF (command = writ) THEN ASSERT rcdt_out(bank) = '0' REPORT InstancePath & partID & BankString & ": write command" & " received too soon after active." SEVERITY SeverityMode; ASSERT ((AddressIn(10) = '0') OR (AddressIn(10) = '1')) REPORT InstancePath & partID & BankString & ": AddressIn(10) = X" & " during write command. Next state unknown." SEVERITY SeverityMode; FixColumnAddress(bank); WriteToMem(bank); Burst_Cnt(bank) := 1; IF (AddressIn(10) = '0') THEN statebank(bank) <= write; ELSIF (AddressIn(10) = '1') THEN statebank(bank) <= write_auto_pre; END IF; written := true; ELSIF (cur_bank = bank) OR (command = mrs) THEN ASSERT false REPORT InstancePath & partID & BankString & ": Illegal command " & "received in active state." SEVERITY SeverityMode; END IF; WHEN write => IF (command = bst) THEN IF rising_edge(CLKIn) THEN ASSERT false REPORT InstancePath & partID & BankString & ": Illegal command " & "received in write state." SEVERITY SeverityMode; END IF; ELSIF (command = read) THEN IF cur_bank = bank THEN FixColumnAddress(bank); ReadFromMem(bank); Burst_Cnt(bank) := 1; IF (AddressIn(10) = '0') THEN statebank(bank) <= read; ELSIF (AddressIn(10) = '1') THEN statebank(bank) <= read_auto_pre; END IF; ELSE statebank(bank) <= bank_act; END IF; ELSIF (command = writ) THEN IF (Burst_Cnt(bank) = Burst_Length) THEN statebank(bank) <= bank_act; Burst_Cnt(bank) := 0; ras_in(bank) <= '1'; Burst_Inc(bank) := 0; ELSE IF cur_bank = bank THEN FixColumnAddress(bank); ASSERT ((AddressIn(10) = '0') OR (AddressIn(10) = '1')) REPORT InstancePath & partID & BankString & ": AddressIn(10) = X" & " during write command. Next state unknown." SEVERITY SeverityMode; IF (AddressIn(10) = '0') THEN statebank(bank) <= write; ELSIF (AddressIn(10) = '1') THEN statebank(bank) <= write_auto_pre; END IF; WriteToMem(bank); Burst_Cnt(bank) := 1; written := true; ELSE statebank(bank)<=bank_act; END IF; END IF; ELSIF (command = pre) AND ((cur_bank = bank) OR (AddressIn(10) = '1')) THEN ASSERT ras_out(bank) = '1' REPORT InstancePath & partID & BankString & ": precharge command" & " does not meet tRAS time." SEVERITY SeverityMode; ASSERT (DQM_nwv = '1') REPORT InstancePath & partID & BankString & ": DQM should be" & " held high, data is lost." SEVERITY SeverityMode; statebank(bank) <= precharge, idle AFTER tdevice_TRP; ELSIF (command = nop) OR (cur_bank /= bank) THEN IF (Burst_Cnt(bank) = Burst_Length OR WB = single) THEN statebank(bank) <= bank_act; Burst_Cnt(bank) := 0; ras_in(bank) <= '1'; Burst_Inc(bank) := 0; ELSE statebank(bank) <= write; BurstCtrl(bank); WriteToMem(bank); END IF; ELSIF cur_bank = bank THEN ASSERT false REPORT InstancePath & partID & ": Illegal command" & " received in write state." SEVERITY SeverityMode; END IF; WHEN read => IF (command = bst) THEN statebank(bank) <= bank_act; Burst_Cnt(bank) := 0; Burst_Inc(bank) := 0; ELSIF (command = read) THEN
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