dsata.vhd

Vhdl cod for a bus.For sp2e

            WAIT UNTIl RESET ='1' OR COMRESET = '1' FOR 160 * TXPERIOD;
            EXIT comwake_loop WHEN (RESET = '1' OR COMRESET = '1');
            FOR i IN 0 TO 3 LOOP
                SendAlign(TX_shift_rdy, TXclk, TX_ld, TX_reg);
                EXIT comwake_loop WHEN (RESET = '1' OR COMRESET = '1');
                WAIT UNTIL TXclk = '1';
            END LOOP;
            WAIT UNTIL TX_shift_reg_empty = '1';
            WAIT UNTIl RESET ='1' OR COMRESET = '1' FOR MAX_COMWAKE_SPACE;
            EXIT comwake_loop WHEN (RESET = '1' OR COMRESET = '1');
--            transmit_comwake_end <= '1';--, '0' AFTER RXPERIOD;
            transmit_comwake_end <= '1', '0' AFTER 40 * RXPERIOD;
            WAIT UNTIL TXclk = '1';
--            transmit_comwake_end <= '0';
            EXIT;
        END LOOP;
        END IF;
        IF transmit_align = '1' THEN 
--            WAIT UNTIL TXclk = '1';        
            SendAlign(TX_shift_rdy, TXclk, TX_ld, TX_reg);
--            transmit_align_end <= '1', '0' AFTER 40 * RXPERIOD;
            transmit_align_end <= '1';
            WAIT UNTIL TXclk = '1';
            transmit_align_end <= '0';
        END IF;      
        IF transmit_link_data = '1' THEN
--            WAIT UNTIL TXclk = '1';        
            IF TX_shift_rdy = '0' THEN
                WAIT UNTIL TX_shift_rdy = '1';
            END IF;
            WAIT UNTIL TXclk = '1';
            TX_reg <= DATAIN(9 DOWNTO 0);
               TX_ld <= '1';
            WAIT UNTIL TXclk = '1';        
               TX_ld <= '0';               
               WAIT UNTIL TX_shift_rdy = '1';
            WAIT UNTIL TXclk = '1';
               TX_reg <= DATAIN(19 DOWNTO 10);
               TX_ld <= '1';
            WAIT UNTIL TXclk = '1';        
               TX_ld <= '0';               
               WAIT UNTIL TX_shift_rdy = '1';
            WAIT UNTIL TXclk = '1';
               TX_reg <= DATAIN(29 DOWNTO 20);
               TX_ld <= '1';
            WAIT UNTIL TXclk = '1';        
               TX_ld <= '0';               
               WAIT UNTIL TX_shift_rdy = '1';
            WAIT UNTIL TXclk = '1';
               TX_reg <= DATAIN(39 DOWNTO 30);
               TX_ld <= '1';
            WAIT UNTIL TXclk = '1';        
               TX_ld <= '0';               
           END IF;        
    END PROCESS DATA_TRANS;              

    ----------------------------------------------------------------------------
    -- Control block                                                          --
    ----------------------------------------------------------------------------                   
--    PHY_CONTROL : PROCESS(TXclk, PHYRESET, COMRESET)   
    PHY_CONTROL : PROCESS(SYSTEMCLOCK, PHYRESET, COMRESET)   
    BEGIN           
        IF PHYRESET = '1' OR COMRESET = '1' THEN       
            init_state <= DR_RESET;
        ELSIF rising_edge(SYSTEMCLOCK) THEN       
            CASE init_state IS
                WHEN DR_RESET =>
                    IF COMRESET = '1' OR PHYRESET = '1' THEN
                        init_state <= DR_RESET;
                    ELSIF COMRESET = '0' AND PHYRESET = '0' THEN
                        init_state <= DR_COMINIT;
                    ELSE
                        init_state <= DR_RESET;                    
                    END IF;                 
                WHEN DR_COMINIT =>
                    IF transmit_cominit_end  = '1' THEN
                        init_state <= DR_AwaitCOMWAKE;
                    ELSE   
                        init_state <= DR_COMINIT;                    
                    END IF; 
                WHEN DR_AwaitCOMWAKE =>         
                    IF COMWAKE = '1' THEN
                        init_state <= DR_AwaitNoCOMWAKE;
                    ELSE   
                        init_state <= DR_AwaitCOMWAKE;                    
                    END IF;                     
                WHEN DR_AwaitNoCOMWAKE =>
                    IF COMWAKE = '0' AND power_on = '1' THEN
                        init_state <= DR_Calibrate;
                    ELSIF COMWAKE = '0' AND power_on = '0' THEN
                        init_state <= DR_COMWAKE;
                    ELSE   
                        init_state <= DR_AwaitNoCOMWAKE;                    
                    END IF;                                 
                WHEN DR_Calibrate =>            
                    IF calibration_end = '1' THEN
                        init_state <= DR_COMWAKE;
                    ELSE 
                        init_state <= DR_Calibrate;
                    END IF;                                        
                WHEN DR_COMWAKE =>
                    IF transmit_comwake_end  = '1' THEN
                        init_state <= DR_SendAlign;
                    ELSE   
                        init_state <= DR_COMWAKE;                    
                    END IF;                 
                    WHEN DR_SendAlign =>
                    IF align_ctrl  = '1' THEN
                        init_state <= DR_Ready;
                    ELSIF send_align_cnt = 0 AND speed > 1 THEN   
                        init_state <= DR_ReduceSpeed; 
                    ELSIF send_align_cnt = 0 AND speed = 1 THEN   
                        init_state <= DR_Error; 
                    ELSE
                        init_state <= DR_SendAlign;                                           
                    END IF;                 
                WHEN DR_Ready =>
                    IF PARTIAL  = '1' THEN
                        init_state <= DR_Partial;
                    ELSIF SLUMBER = '1' THEN   
                        init_state <= DR_Slumber;   
                    ELSE 
                        init_state <= DR_Ready;                                        
                    END IF;                 
                WHEN DR_Partial =>   
                    IF PARTIAL  = '0' AND COMWAKE = '0' THEN
                        init_state <= DR_COMWAKE;
                    ELSIF PARTIAL  = '0' AND COMWAKE = '1'  THEN   
                        init_state <= DR_AwaitNoCOMWAKE;   
                    ELSE 
                        init_state <= DR_Partial;                                        
                    END IF;                                 
                WHEN DR_Slumber =>
                    IF SLUMBER  = '0' AND COMWAKE = '0' THEN
                        init_state <= DR_COMWAKE;
                    ELSIF SLUMBER  = '0' AND COMWAKE = '1'  THEN   
                        init_state <= DR_AwaitNoCOMWAKE;   
                    ELSE 
                        init_state <= DR_Partial;                                        
                    END IF;                                 
                    WHEN DR_ReduceSpeed =>        
                        init_state <= DR_SendAlign;                    
                WHEN DR_Error =>
                    IF resume  = '1' THEN
                        init_state <= DR_COMWAKE;
                    ELSE    
                        init_state <= DR_Error;                    
                    END IF;
                WHEN others => 
                    init_state <= DR_RESET;                 
            END CASE;
        END IF;
           END PROCESS PHY_CONTROL;

        CONTROL_OUT : PROCESS(init_state)--, send_align_cnt)
        BEGIN                      
            PHYRDY <= '0';         
            transmit_cominit <= '0';
            transmit_comwake <= '0';
            transmit_align <= '0';
            CASE init_state IS
                WHEN DR_RESET =>
                WHEN DR_COMINIT => transmit_cominit <= '1';--, '0' AFTER 1 ps;
                WHEN DR_AwaitCOMWAKE =>         
                WHEN DR_AwaitNoCOMWAKE =>
                WHEN DR_Calibrate => calibration_end <= '1' AFTER 238 ns;           
                WHEN DR_COMWAKE => transmit_comwake <= '1';--, '0' AFTER 1 ps;
                                    reset_align_cnt <= '1', '0' AFTER 1 ps;
                    WHEN DR_SendAlign => transmit_align <= '1';--, '0' AFTER 1 ps;
                WHEN DR_Ready => PHYRDY <= '1';
                WHEN DR_Partial =>    
                WHEN DR_Slumber =>
                    WHEN DR_ReduceSpeed =>  reset_align_cnt <= '1', '0' AFTER 1 ps;      
                WHEN DR_Error =>               
                WHEN others =>
            END CASE;        
        END PROCESS CONTROL_OUT;

        ALIGN_CNT : PROCESS(reset_align_cnt, transmit_align_end)
        BEGIN                 
            IF rising_edge(reset_align_cnt) THEN
                send_align_cnt <= 2048;
            END IF;
            IF rising_edge(transmit_align_end) THEN
                send_align_cnt <= send_align_cnt - 1;
            END IF;        
        END PROCESS ALIGN_CNT;

    ----------------------------------------------------------------------------
    ----------------------------------------------------------------------------
    --                       LINK                                             --
    ----------------------------------------------------------------------------
    ----------------------------------------------------------------------------
    ----------------------------------------------------------------------------
    -- SYSTEM CLOCK                                                           --
    ----------------------------------------------------------------------------                   
    SYSTEMCLOCK <= NOT(SYSTEMCLOCK) AFTER (40*TXPERIOD)/2;

    ----------------------------------------------------------------------------
    -- Transmit control                                                           --
    ----------------------------------------------------------------------------                   
        LINK_STATE_TR : PROCESS (RESET, SYSTEMCLOCK)
        BEGIN                     
            IF RESET = '1' THEN
                link_state <= LS4_L_RESET;
            ELSIF rising_edge(SYSTEMCLOCK) THEN
                link_state <= next_link_state;
            END IF;
        END PROCESS LINK_STATE_TR;    
        LINK_TX_NXT : PROCESS ( link_state, PHYRDY, 
                                RX_fifo_full, TX_fifo_empty,
                                TP_result, 
                                crc_check,
                                SYNCp, R_RDYp, X_RDYp, SOFp, EOFp, WTRMp, HOLDp, HOLDAp,
                                R_IPp, R_OKp, R_ERRp)
        BEGIN                   
            CASE link_state IS
                WHEN L1_L_IDLE => 
                    IF PHYRDY = '0' THEN
                        next_link_state <= LS1_L_NoCommErr;                    
                    ELSIF TX_fifo_empty = '0' THEN
                        next_link_state <= LT2_DL_SendChkRdy;
                    ELSIF X_RDYp = '1' THEN
                        next_link_state <= LR2_L_RcvWaitFifo;                    
                    ELSE
                        next_link_state <= L1_L_IDLE;                    
                    END IF;                
                WHEN LS1_L_NoCommErr => next_link_state <= LS2_L_NoComm;
                WHEN LS2_L_NoComm =>  
                    IF PHYRDY = '1' THEN
                        next_link_state <= LS3_L_SendAlign;
                    ELSE
                        next_link_state <= LS2_L_NoComm;
                    END IF;
                WHEN LS3_L_SendAlign =>
                    IF PHYRDY = '1' THEN
                        next_link_state <= L1_L_IDLE;
                    ELSE
                        next_link_state <= LS1_L_NoCommErr;
                    END IF;
                WHEN LS4_L_RESET => next_link_state <= LS2_L_NoComm;
                WHEN LT2_DL_SendChkRdy =>
                    IF PHYRDY = '0' THEN
                        next_link_state <= LS1_L_NoCommErr;
                    ELSIF R_RDYp = '1' THEN
                        next_link_state <= LT3_L_SendSOF;
                    ELSE
                        next_link_state <= LT2_DL_SendChkRdy;
                    END IF;                                
                WHEN LT3_L_SendSOF =>
                    IF PHYRDY = '0' THEN
                        next_link_state <= LS1_L_NoCommErr;
                    ELSIF SYNCp = '1' THEN
                        next_link_state <= L1_L_IDLE;
                    ELSE
                        next_link_state <= LT4_L_SendData;
                    END IF;                                
                WHEN LT4_L_SendData =>
                    IF PHYRDY = '0' THEN
                        next_link_state <= LS1_L_NoCommErr;
                    ELSIF SYNCp = '1' THEN
                        next_link_state <= L1_L_IDLE;
                    ELSIF HOLDp = '1' AND TX_fifo_empty = '0' THEN
                        next_link_state <= LT5_L_RcvrHold;
--                    ELSIF TP_no_data = '1' THEN
                    ELSIF TX_fifo_empty = '1' THEN
                        next_link_state <= LT7_L_SendCRC;
                    ELSE
                        next_link_state <= LT4_L_SendData;
                    END IF;                                                
                WHEN LT5_L_RcvrHold =>                  
                    IF PHYRDY = '0' THEN
                        next_link_state <= LS1_L_NoCommErr;
                    ELSIF SYNCp = '1' THEN
                        next_link_state <= L1_L_IDLE;
                    ELSIF HOLDp = '1' AND TX_fifo_empty = '0' THEN
                        next_link_state <= LT5_L_RcvrHold;
                    ELSE
                        next_link_state <= LT4_L_SendData;
                    END IF;                                                                
                WHEN LT6_L_SendHold =>
                WHEN LT7_L_SendCRC => 
                    IF PHYRDY = '0' THEN
                        next_link_state <= LS1_L_NoCommErr;
                    ELSIF SYNCp = '1' THEN
                        next_link_state <= L1_L_IDLE;