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📄 demo6.rpt

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* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:   d:\eda-240h\altera\7128_84_vhdl\demo6\demo6.rpt
demo6

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'F':

                   Logic cells placed in LAB 'F'
        +--------- LC84 |WAVEGENERATOR:11|LPM_ADD_SUB:955|addcore:adder|result_node6
        | +------- LC91 |WAVEGENERATOR:11|LPM_ADD_SUB:955|addcore:adder|result_node7
        | | +----- LC82 |WAVEGENERATOR:11|da5
        | | | +--- LC81 |WAVEGENERATOR:11|da2
        | | | | +- LC89 |WAVEGENERATOR:11|~1098~3
        | | | | | 
        | | | | |   Other LABs fed by signals
        | | | | |   that feed LAB 'F'
LC      | | | | | | A B C D E F G H |     Logic cells that feed LAB 'F':
LC82 -> * * * * * | - - - * * * * * | <-- |WAVEGENERATOR:11|da5
LC81 -> - - * * - | - - - * * * * * | <-- |WAVEGENERATOR:11|da2
LC89 -> - - * - - | - - - - - * - - | <-- |WAVEGENERATOR:11|~1098~3

Pin
83   -> - - - - - | - - - - - - - - | <-- CLK
58   -> - - * * * | - - - * * * * * | <-- MODE0
60   -> - - * * * | - - - * * * * * | <-- MODE1
1    -> - - - - - | - - - - * - - - | <-- RESET
LC117-> - - * - * | - - - - - * - - | <-- |WAVEGENERATOR:11|LPM_ADD_SUB:238|addcore:adder|result_node5
LC115-> - - * - - | - - - - - * - - | <-- |WAVEGENERATOR:11|LPM_ADD_SUB:399|addcore:adder|result_node5
LC118-> - - - - * | - - - - - * - - | <-- |WAVEGENERATOR:11|LPM_ADD_SUB:560|addcore:adder|result_node5
LC121-> - * * * * | - - - * * * * * | <-- |WAVEGENERATOR:11|da7
LC106-> * * * * * | - - - * * * * * | <-- |WAVEGENERATOR:11|da6
LC51 -> - - * * * | - - - * * * * * | <-- |WAVEGENERATOR:11|da4
LC71 -> - - * * - | - - - * * * * * | <-- |WAVEGENERATOR:11|da3
LC50 -> - - * * - | - - - * * * * * | <-- |WAVEGENERATOR:11|da1
LC74 -> - - * * - | - - - * * * * * | <-- |WAVEGENERATOR:11|da0
LC76 -> - - * * * | - - - * * * * * | <-- |WAVEGENERATOR:11|porn~184
LC105-> - - * - - | - - - - - * - - | <-- |WAVEGENERATOR:11|~1098~1
LC107-> - - * - - | - - - - - * - - | <-- |WAVEGENERATOR:11|~1098~2
LC68 -> - - - * - | - - - - - * - - | <-- |WAVEGENERATOR:11|~1134~1


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:   d:\eda-240h\altera\7128_84_vhdl\demo6\demo6.rpt
demo6

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'G':

                                         Logic cells placed in LAB 'G'
        +------------------------------- LC108 |WAVEGENERATOR:11|LPM_ADD_SUB:238|addcore:adder|result_node3
        | +----------------------------- LC104 |WAVEGENERATOR:11|LPM_ADD_SUB:238|addcore:adder|result_node4
        | | +--------------------------- LC100 |WAVEGENERATOR:11|LPM_ADD_SUB:399|addcore:adder|result_node3
        | | | +------------------------- LC99 |WAVEGENERATOR:11|LPM_ADD_SUB:399|addcore:adder|result_node4
        | | | | +----------------------- LC112 |WAVEGENERATOR:11|LPM_ADD_SUB:560|addcore:adder|result_node3
        | | | | | +--------------------- LC109 |WAVEGENERATOR:11|LPM_ADD_SUB:560|addcore:adder|result_node4
        | | | | | | +------------------- LC103 |WAVEGENERATOR:11|LPM_ADD_SUB:724|addcore:adder|result_node3
        | | | | | | | +----------------- LC101 |WAVEGENERATOR:11|LPM_ADD_SUB:724|addcore:adder|result_node4
        | | | | | | | | +--------------- LC110 |WAVEGENERATOR:11|LPM_ADD_SUB:724|addcore:adder|result_node5
        | | | | | | | | | +------------- LC106 |WAVEGENERATOR:11|da6
        | | | | | | | | | | +----------- LC97 |WAVEGENERATOR:11|~1086~1
        | | | | | | | | | | | +--------- LC98 |WAVEGENERATOR:11|~1086~2
        | | | | | | | | | | | | +------- LC102 |WAVEGENERATOR:11|~1086~3
        | | | | | | | | | | | | | +----- LC105 |WAVEGENERATOR:11|~1098~1
        | | | | | | | | | | | | | | +--- LC107 |WAVEGENERATOR:11|~1098~2
        | | | | | | | | | | | | | | | +- LC111 |WAVEGENERATOR:11|~1146~2
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'G'
LC      | | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'G':
LC110-> - - - - - - - - - - - - - * * - | - - - - - - * - | <-- |WAVEGENERATOR:11|LPM_ADD_SUB:724|addcore:adder|result_node5
LC106-> - - - - - - - - - * * * * * * - | - - - * * * * * | <-- |WAVEGENERATOR:11|da6
LC97 -> - - - - - - - - - * - - - - - - | - - - - - - * - | <-- |WAVEGENERATOR:11|~1086~1
LC98 -> - - - - - - - - - * - - - - - - | - - - - - - * - | <-- |WAVEGENERATOR:11|~1086~2
LC102-> - - - - - - - - - * - - - - - - | - - - - - - * - | <-- |WAVEGENERATOR:11|~1086~3

Pin
83   -> - - - - - - - - - - - - - - - - | - - - - - - - - | <-- CLK
58   -> - - - - - - - - - * * * * * * * | - - - * * * * * | <-- MODE0
60   -> - - - - - - - - - * * * * * * * | - - - * * * * * | <-- MODE1
1    -> - - - - - - - - - - - - - - - - | - - - - * - - - | <-- RESET
LC116-> - - - - - - - - - * - - * - - - | - - - - - - * - | <-- |WAVEGENERATOR:11|LPM_ADD_SUB:238|addcore:adder|result_node6
LC127-> - - - - - - - - - * - - - - - - | - - - - - - * - | <-- |WAVEGENERATOR:11|LPM_ADD_SUB:399|addcore:adder|result_node6
LC125-> - - - - - - - - - - - - * - - - | - - - - - - * - | <-- |WAVEGENERATOR:11|LPM_ADD_SUB:560|addcore:adder|result_node6
LC123-> - - - - - - - - - - * * - - - - | - - - - - - * - | <-- |WAVEGENERATOR:11|LPM_ADD_SUB:724|addcore:adder|result_node6
LC84 -> - - - - - - - - - - - * * - - - | - - - - - - * - | <-- |WAVEGENERATOR:11|LPM_ADD_SUB:955|addcore:adder|result_node6
LC121-> - - - - - - - - - * - * * - * - | - - - * * * * * | <-- |WAVEGENERATOR:11|da7
LC82 -> - - - - - - - - * * - * * - * - | - - - * * * * * | <-- |WAVEGENERATOR:11|da5
LC51 -> - * - * - * - * * * * * * * * - | - - - * * * * * | <-- |WAVEGENERATOR:11|da4
LC71 -> * * * * * * * * * * - * - - * - | - - - * * * * * | <-- |WAVEGENERATOR:11|da3
LC81 -> * * * * * * * * * * * - - * - - | - - - * * * * * | <-- |WAVEGENERATOR:11|da2
LC50 -> * * * * * * * * * * * - - * - * | - - - * * * * * | <-- |WAVEGENERATOR:11|da1
LC74 -> * * * * * * * * * * * - - * - * | - - - * * * * * | <-- |WAVEGENERATOR:11|da0
LC76 -> - - - - - - - - - * * * * * * * | - - - * * * * * | <-- |WAVEGENERATOR:11|porn~184


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:   d:\eda-240h\altera\7128_84_vhdl\demo6\demo6.rpt
demo6

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'H':

                                         Logic cells placed in LAB 'H'
        +------------------------------- LC126 IO_DS1
        | +----------------------------- LC128 IO_DS2
        | | +--------------------------- LC117 |WAVEGENERATOR:11|LPM_ADD_SUB:238|addcore:adder|result_node5
        | | | +------------------------- LC116 |WAVEGENERATOR:11|LPM_ADD_SUB:238|addcore:adder|result_node6
        | | | | +----------------------- LC115 |WAVEGENERATOR:11|LPM_ADD_SUB:399|addcore:adder|result_node5
        | | | | | +--------------------- LC127 |WAVEGENERATOR:11|LPM_ADD_SUB:399|addcore:adder|result_node6
        | | | | | | +------------------- LC119 |WAVEGENERATOR:11|LPM_ADD_SUB:399|addcore:adder|result_node7
        | | | | | | | +----------------- LC118 |WAVEGENERATOR:11|LPM_ADD_SUB:560|addcore:adder|result_node5
        | | | | | | | | +--------------- LC125 |WAVEGENERATOR:11|LPM_ADD_SUB:560|addcore:adder|result_node6
        | | | | | | | | | +------------- LC124 |WAVEGENERATOR:11|LPM_ADD_SUB:560|addcore:adder|result_node7
        | | | | | | | | | | +----------- LC123 |WAVEGENERATOR:11|LPM_ADD_SUB:724|addcore:adder|result_node6
        | | | | | | | | | | | +--------- LC120 |WAVEGENERATOR:11|LPM_ADD_SUB:724|addcore:adder|result_node7
        | | | | | | | | | | | | +------- LC121 |WAVEGENERATOR:11|da7
        | | | | | | | | | | | | | +----- LC122 |WAVEGENERATOR:11|~1074~1
        | | | | | | | | | | | | | | +--- LC113 |WAVEGENERATOR:11|~1074~2
        | | | | | | | | | | | | | | | +- LC114 |WAVEGENERATOR:11|~1074~3
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'H'
LC      | | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'H':
LC119-> - - - - - - - - - - - - * - - - | - - - - - - - * | <-- |WAVEGENERATOR:11|LPM_ADD_SUB:399|addcore:adder|result_node7
LC124-> - - - - - - - - - - - - - - - * | - - - - - - - * | <-- |WAVEGENERATOR:11|LPM_ADD_SUB:560|addcore:adder|result_node7
LC120-> - - - - - - - - - - - - - * * - | - - - - - - - * | <-- |WAVEGENERATOR:11|LPM_ADD_SUB:724|addcore:adder|result_node7
LC121-> - - - - - - * - - * - * * - * * | - - - * * * * * | <-- |WAVEGENERATOR:11|da7
LC122-> - - - - - - - - - - - - * - - - | - - - - - - - * | <-- |WAVEGENERATOR:11|~1074~1
LC113-> - - - - - - - - - - - - * - - - | - - - - - - - * | <-- |WAVEGENERATOR:11|~1074~2
LC114-> - - - - - - - - - - - - * - - - | - - - - - - - * | <-- |WAVEGENERATOR:11|~1074~3

Pin
83   -> - - - - - - - - - - - - - - - - | - - - - - - - - | <-- CLK
58   -> - - - - - - - - - - - - * * * * | - - - * * * * * | <-- MODE0
60   -> - - - - - - - - - - - - * * * * | - - - * * * * * | <-- MODE1
1    -> - - - - - - - - - - - - - - - - | - - - - * - - - | <-- RESET
LC66 -> - - - - - - - - - - - - * - - * | - - - - - - - * | <-- |WAVEGENERATOR:11|LPM_ADD_SUB:238|addcore:adder|result_node7
LC91 -> - - - - - - - - - - - - - - * * | - - - - - - - * | <-- |WAVEGENERATOR:11|LPM_ADD_SUB:955|addcore:adder|result_node7
LC106-> - - - * - * * - * * * * * * * * | - - - * * * * * | <-- |WAVEGENERATOR:11|da6
LC82 -> - - * * * * * * * * * * * - * * | - - - * * * * * | <-- |WAVEGENERATOR:11|da5
LC51 -> - - * * * * * * * * * * * * * * | - - - * * * * * | <-- |WAVEGENERATOR:11|da4
LC71 -> - - * * * * * * * * * * * - * - | - - - * * * * * | <-- |WAVEGENERATOR:11|da3
LC81 -> - - * * * * * * * * * * * * - - | - - - * * * * * | <-- |WAVEGENERATOR:11|da2
LC50 -> - - * * * * * * * * * * * * - - | - - - * * * * * | <-- |WAVEGENERATOR:11|da1
LC74 -> - - * * * * * * * * * * * * - - | - - - * * * * * | <-- |WAVEGENERATOR:11|da0
LC76 -> - - - - - - - - - - - - * * * * | - - - * * * * * | <-- |WAVEGENERATOR:11|porn~184


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:   d:\eda-240h\altera\7128_84_vhdl\demo6\demo6.rpt
demo6

** EQUATIONS **

CLK      : INPUT;
MODE0    : INPUT;
MODE1    : INPUT;
RESET    : INPUT;
SW1      : INPUT;
SW2      : INPUT;
SW3      : INPUT;
SW4      : INPUT;
SW5      : INPUT;
SW6      : INPUT;
SW7      : INPUT;
SW8      : INPUT;

-- Node name is 'D_OUT0' 
-- Equation name is 'D_OUT0', location is LC065, type is output.
 D_OUT0  = LCELL( _EQ001 $  RESET);
  _EQ001 = !_LC074 &  RESET;

-- Node name is 'D_OUT1' 
-- Equation name is 'D_OUT1', location is LC067, type is output.
 D_OUT1  = LCELL( _EQ002 $  RESET);
  _EQ002 = !_LC050 &  RESET;

-- Node name is 'D_OUT2' 
-- Equation name is 'D_OUT2', location is LC069, type is output.
 D_OUT2  = LCELL( _EQ003 $  RESET);
  _EQ003 = !_LC081 &  RESET;

-- Node name is 'D_OUT3' 
-- Equation name is 'D_OUT3', location is LC072, type is output.
 D_OUT3  = LCELL( _EQ004 $  RESET);
  _EQ004 = !_LC071 &  RESET;

-- Node name is 'D_OUT4' 
-- Equation name is 'D_OUT4', location is LC073, type is output.
 D_OUT4  = LCELL( _EQ005 $  RESET);
  _EQ005 = !_LC051 &  RESET;

-- Node name is 'D_OUT5' 
-- Equation name is 'D_OUT5', location is LC075, type is output.
 D_OUT5  = LCELL( _EQ006 $  RESET);
  _EQ006 = !_LC082 &  RESET;

-- Node name is 'D_OUT6' 
-- Equation name is 'D_OUT6', location is LC077, type is output.
 D_OUT6  = LCELL( _EQ007 $  RESET);
  _EQ007 = !_LC106 &  RESET;

-- Node name is 'D_OUT7' 
-- Equation name is 'D_OUT7', location is LC080, type is output.
 D_OUT7  = LCELL( _EQ008 $  RESET);
  _EQ008 = !_LC121 &  RESET;

-- Node name is 'IO_DS1' 
-- Equation name is 'IO_DS1', location is LC126, type is output.
 IO_DS1  = LCELL( GND $  GND);

-- Node name is 'IO_DS2' 
-- Equation name is 'IO_DS2', location is LC128, type is output.
 IO_DS2  = LCELL( GND $  GND);

-- Node name is '|WAVEGENERATOR:11|:20' = '|WAVEGENERATOR:11|da0' 
-- Equation name is '_LC074', type is buried 
_LC074   = TFFE(!_EQ009, GLOBAL( CLK), GLOBAL( RESET),  VCC,  VCC);
  _EQ009 =  _LC050 &  _LC051 &  _LC071 &  _LC074 & !_LC076 &  _LC081 & 
              _LC082 &  _LC106 &  _LC121 & !MODE0 &  MODE1
         # !_LC050 & !_LC051 & !_LC071 & !_LC074 &  _LC076 & !_LC081 & 
             !_LC082 & !_LC106 & !_LC121 &  MODE1
         #  _LC074 &  MODE0 &  MODE1 &  _X001
         # !_LC074 &  MODE0 &  MODE1;
  _X001  = EXP( _LC051 &  _LC082 &  _LC106 &  _LC121);

-- Node name is '|WAVEGENERATOR:11|:19' = '|WAVEGENERATOR:11|da1' 
-- Equation name is '_LC050', type is buried 
_LC050   = DFFE( _EQ010 $  _EQ011, GLOBAL( CLK), GLOBAL( RESET),  VCC,  VCC);
  _EQ010 = !_LC051 & !_LC071 & !_LC074 &  _LC076 & !_LC079 & !_LC081 & 
             !_LC082 & !_LC106 & !_LC111 & !_LC121 & !MODE0 &  MODE1 &  _X002 & 
              _X003
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