demo9.rpt

DEMO2 数码管扫描显示电路/DEMO4 计数时钟 DEMO5 键盘扫描设计/DEMO6 波形发生器/DEMO7 用DAC实现电压信号检测/DEMO8 ADC电压测量/DEMO9 液晶驱动电路设计

LC99 -> - - - - - - - - - - - - * - - - | - - - - - * - - | <-- MEMA1
LC106-> - - - - - - - - - - - - - - * - | - - - - - * - - | <-- |XLCD1:1|LPM_ADD_SUB:1062|addcore:adder|addcore:adder0|result_node1
LC58 -> - - * - - * * * * * * * * * * * | - - * * * * * * | <-- |XLCD1:1|temp13
LC57 -> - * * - * * * * - * * * * * * * | - - * * * * * * | <-- |XLCD1:1|temp12
LC56 -> * * * * * * * * - * * * * * * * | - - * * * * * * | <-- |XLCD1:1|temp11
LC33 -> * * * * * * * * * * * * * * * * | - - * * * * * * | <-- |XLCD1:1|temp8
LC77 -> * * * * * * * * * * * * * * * * | - - * * * * * * | <-- |XLCD1:1|temp7
LC110-> * * * * * * * * * * * * * * * * | - - * * * * * * | <-- |XLCD1:1|temp6
LC42 -> * * * * * * * * * * * * * * * * | - - * * * * * * | <-- |XLCD1:1|temp5
LC119-> * * * * * * * * * * * * * * * - | - - * * * * * * | <-- |XLCD1:1|temp4
LC100-> * * * * * * * * * * * * * * * * | - - * * * * * * | <-- |XLCD1:1|temp3
LC45 -> * * * * * * * * * * * * * * * - | - - * * * * * * | <-- |XLCD1:1|temp2
LC40 -> * * * * * * * * * * * * * * * - | - - * * * * * * | <-- |XLCD1:1|temp1
LC113-> * * * * * * * * * * * * * * * * | - - * * * * * * | <-- |XLCD1:1|temp0
LC34 -> - - - - - - * - - - - - - - - - | - - - - - * - - | <-- |XLCD1:1|~1952~2
LC63 -> - - - - - - * - - - - - - - - - | - - - - - * - - | <-- |XLCD1:1|~1952~3
LC38 -> - - - - - - * - - - - - - - - - | - - - - - * - - | <-- |XLCD1:1|~1952~4
LC35 -> - - - - - - * - - - - - - - - - | - - - - - * - - | <-- |XLCD1:1|~1952~5
LC124-> - - - - - - * * * * * - - - - - | - - * * * * * * | <-- |XLCD2:3|~221~1


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:   d:\eda-240h\altera\7128_84_vhdl\demo9\demo9.rpt
demo9

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'G':

                                     Logic cells placed in LAB 'G'
        +--------------------------- LC97 MEMA0
        | +------------------------- LC99 MEMA1
        | | +----------------------- LC101 MEMA2
        | | | +--------------------- LC104 MEMA3
        | | | | +------------------- LC105 MEMA4
        | | | | | +----------------- LC107 MEMA5
        | | | | | | +--------------- LC109 MEMA6
        | | | | | | | +------------- LC106 |XLCD1:1|LPM_ADD_SUB:1062|addcore:adder|addcore:adder0|result_node1
        | | | | | | | | +----------- LC108 |XLCD1:1|LPM_ADD_SUB:1695|addcore:adder|addcore:adder0|result_node1
        | | | | | | | | | +--------- LC110 |XLCD1:1|temp6
        | | | | | | | | | | +------- LC100 |XLCD1:1|temp3
        | | | | | | | | | | | +----- LC103 |XLCD1:1|~1922~2
        | | | | | | | | | | | | +--- LC102 |XLCD1:1|~1928~1
        | | | | | | | | | | | | | +- LC98 |XLCD1:1|~1934~1
        | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | |   that feed LAB 'G'
LC      | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'G':
LC101-> - - * - - - - - - - - - - * | - - - - - - * - | <-- MEMA2
LC104-> - - - * - - - - - - - - * - | - - - - - - * - | <-- MEMA3
LC105-> - - - - - - - - - - - * - - | - - - - - - * - | <-- MEMA4
LC109-> - - - - - - * - - - - - - - | - - - - - - * - | <-- MEMA6
LC110-> - - * * * - * - - - - - * * | - - * * * * * * | <-- |XLCD1:1|temp6
LC100-> - - * * * - * - - - - - * - | - - * * * * * * | <-- |XLCD1:1|temp3
LC103-> - - - - * - - - - - - - - - | - - - - - - * - | <-- |XLCD1:1|~1922~2
LC102-> - - - * - - - - - - - - - - | - - - - - - * - | <-- |XLCD1:1|~1928~1
LC98 -> - - * - - - - - - - - - - - | - - - - - - * - | <-- |XLCD1:1|~1934~1

Pin
83   -> - - - - - - - - - - - - - - | - - - - - - - - | <-- CLK
1    -> - - * * * - * - - - - * * * | - - * - * * * * | <-- RESET
LC89 -> - - - - - * - - - - - - - - | - - - - - * * - | <-- |XLCD1:1|~13~fit~in1
LC41 -> - * - - - - - - - - - - - - | - - * - - - * - | <-- |XLCD1:1|~21~fit~in1
LC74 -> * - - - - - - - - - - - - - | - - - - * - * - | <-- |XLCD1:1|~23~fit~in1
LC58 -> - - * * * - * - - - - * * * | - - * * * * * * | <-- |XLCD1:1|temp13
LC57 -> - - * * * - * - - - - - * * | - - * * * * * * | <-- |XLCD1:1|temp12
LC56 -> - - * * * - * - - - - - * * | - - * * * * * * | <-- |XLCD1:1|temp11
LC84 -> - - * * * - * - - - - - * * | - - * * * * * * | <-- |XLCD1:1|temp10
LC81 -> - - * * * - * - - - - - * * | - - * * * * * * | <-- |XLCD1:1|temp9
LC33 -> - - * * * - * - - - - - * * | - - * * * * * * | <-- |XLCD1:1|temp8
LC77 -> - - * * * - * - - - - - * * | - - * * * * * * | <-- |XLCD1:1|temp7
LC42 -> - - * * * - * - - - - - * * | - - * * * * * * | <-- |XLCD1:1|temp5
LC119-> - - * * - - * - - - - * * * | - - * * * * * * | <-- |XLCD1:1|temp4
LC45 -> - - * * * - * - - - - - - * | - - * * * * * * | <-- |XLCD1:1|temp2
LC40 -> - - * * * - * * * - - - - - | - - * * * * * * | <-- |XLCD1:1|temp1
LC113-> - - * * * - * * * - - - - - | - - * * * * * * | <-- |XLCD1:1|temp0
LC93 -> - - * * * - * - - - * * * * | - - * * * * * * | <-- |XLCD1:1|to2k
LC88 -> - - - - * - - - - - - - - - | - - - - - - * - | <-- |XLCD1:1|~1922~1
LC64 -> - - - - - - - - - * - - - - | - - - - - - * - | <-- |XLCD1:1|~2006~1
LC60 -> - - - - - - - - - * - - - - | - - - - - - * - | <-- |XLCD1:1|~2006~2
LC59 -> - - - - - - - - - - * - - - | - - - - - - * - | <-- |XLCD1:1|~2024~1
LC62 -> - - - - - - - - - - * - - - | - - - - - - * - | <-- |XLCD1:1|~2024~2
LC124-> - - * * * - * - - * * - - - | - - * * * * * * | <-- |XLCD2:3|~221~1


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:   d:\eda-240h\altera\7128_84_vhdl\demo9\demo9.rpt
demo9

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'H':

                                         Logic cells placed in LAB 'H'
        +------------------------------- LC120 CD
        | +----------------------------- LC126 IO_DS1
        | | +--------------------------- LC128 IO_DS2
        | | | +------------------------- LC125 LWRM
        | | | | +----------------------- LC115 MEMA7
        | | | | | +--------------------- LC117 MEMA8
        | | | | | | +------------------- LC118 MEMA9
        | | | | | | | +----------------- LC123 MRON
        | | | | | | | | +--------------- LC114 |XLCD1:1|LPM_ADD_SUB:1062|addcore:adder|addcore:adder0|result_node3
        | | | | | | | | | +------------- LC116 |XLCD1:1|LPM_ADD_SUB:1695|addcore:adder|addcore:adder0|result_node3
        | | | | | | | | | | +----------- LC119 |XLCD1:1|temp4
        | | | | | | | | | | | +--------- LC113 |XLCD1:1|temp0
        | | | | | | | | | | | | +------- LC121 |XLCD1:1|~2018~1
        | | | | | | | | | | | | | +----- LC127 |XLCD2:3|current_state1
        | | | | | | | | | | | | | | +--- LC122 |XLCD2:3|current_state0
        | | | | | | | | | | | | | | | +- LC124 |XLCD2:3|~221~1
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'H'
LC      | | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'H':
LC115-> - - - - * - - - - - - - - - - - | - - - - - - - * | <-- MEMA7
LC117-> - - - - - * - - - - - - - - - - | - - - - - - - * | <-- MEMA8
LC118-> - - - - - - * - - - - - - - - - | - - - - - - - * | <-- MEMA9
LC119-> - - - - * * * - - - - * * - - - | - - * * * * * * | <-- |XLCD1:1|temp4
LC113-> - - - - * * * - * * * * - - - - | - - * * * * * * | <-- |XLCD1:1|temp0
LC121-> - - - - - - - - - - * - - - - - | - - - - - - - * | <-- |XLCD1:1|~2018~1
LC127-> - - - * - - - * - - - - - * - * | - - - - - - - * | <-- |XLCD2:3|current_state1
LC122-> - - - * - - - * - - - - - * * * | - - - - - - - * | <-- |XLCD2:3|current_state0
LC124-> - - - - * * * - - - * * - - - - | - - * * * * * * | <-- |XLCD2:3|~221~1

Pin
83   -> - - - - - - - - - - - - - - - - | - - - - - - - - | <-- CLK
1    -> - - - * * * * * - - - - - * * * | - - * - * * * * | <-- RESET
LC61 -> - - - - - - - - - - * - * - - - | - - - - - - - * | <-- |XLCD1:1|LPM_ADD_SUB:1062|addcore:adder|addcore:adder0|result_node4
LC68 -> - - - - - - - - - - * - * - - - | - - - - - - - * | <-- |XLCD1:1|LPM_ADD_SUB:1695|addcore:adder|addcore:adder0|result_node4
LC83 -> * - - - - - - - - - - - - - - - | - - - - - * - * | <-- |XLCD1:1|~3~fit~in1
LC67 -> - - - * - - - - - - - - - - - - | - - - - * - - * | <-- |XLCD1:1|:25
LC58 -> - - - - * * * - - - * * * - - - | - - * * * * * * | <-- |XLCD1:1|temp13
LC57 -> - - - - * * * - - - * * * - - - | - - * * * * * * | <-- |XLCD1:1|temp12
LC56 -> - - - - * * * - - - * * * - - - | - - * * * * * * | <-- |XLCD1:1|temp11
LC84 -> - - - - * * * - - - * * * - - - | - - * * * * * * | <-- |XLCD1:1|temp10
LC81 -> - - - - * * * - - - * * * - - - | - - * * * * * * | <-- |XLCD1:1|temp9
LC33 -> - - - - * * * - - - * * * - - - | - - * * * * * * | <-- |XLCD1:1|temp8
LC77 -> - - - - * * * - - - * * * - - - | - - * * * * * * | <-- |XLCD1:1|temp7
LC110-> - - - - * * * - - - * * * - - - | - - * * * * * * | <-- |XLCD1:1|temp6
LC42 -> - - - - * * * - - - * * * - - - | - - * * * * * * | <-- |XLCD1:1|temp5
LC100-> - - - - * * * - * * * * * - - - | - - * * * * * * | <-- |XLCD1:1|temp3
LC45 -> - - - - * * * - * * * * - - - - | - - * * * * * * | <-- |XLCD1:1|temp2
LC40 -> - - - - * * * - * * * * - - - - | - - * * * * * * | <-- |XLCD1:1|temp1
LC93 -> - - - - * * * - - - * * * - - - | - - * * * * * * | <-- |XLCD1:1|to2k
LC91 -> - - - - - - - - - - - * - - - - | - - - - - - - * | <-- |XLCD1:1|~2042~1


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:   d:\eda-240h\altera\7128_84_vhdl\demo9\demo9.rpt
demo9

** EQUATIONS **

CLK      : INPUT;
D0       : INPUT;
D1       : INPUT;
D2       : INPUT;
D3       : INPUT;
D4       : INPUT;
D5       : INPUT;
D6       : INPUT;
D7       : INPUT;
RESET    : INPUT;
SW1      : INPUT;
SW2      : INPUT;
SW3      : INPUT;
SW4      : INPUT;
SW5      : INPUT;
SW6      : INPUT;
SW7      : INPUT;
SW8      : INPUT;

-- Node name is 'CD' = '|XLCD1:1|:3' 
-- Equation name is 'CD', type is output 
 CD      = LCELL( _LC083 $  GND);

-- Node name is 'IO_DS1' 
-- Equation name is 'IO_DS1', location is LC126, type is output.
 IO_DS1  = LCELL( GND $  GND);

-- Node name is 'IO_DS2' 
-- Equation name is 'IO_DS2', location is LC128, type is output.
 IO_DS2  = LCELL( GND $  GND);

-- Node name is 'LWRM' 
-- Equation name is 'LWRM', location is LC125, type is output.
 LWRM    = LCELL( _EQ001 $  RESET);
  _EQ001 =  _LC122 & !_LC127 &  RESET
         # !_LC067 & !RESET;

-- Node name is 'MEMA0' = '|XLCD1:1|:23' 
-- Equation name is 'MEMA0', type is output 
 MEMA0   = LCELL( _LC074 $  GND);

-- Node name is 'MEMA1' = '|XLCD1:1|:21' 
-- Equation name is 'MEMA1', type is output 
 MEMA1   = LCELL( _LC041 $  GND);

-- Node name is 'MEMA2' = '|XLCD1:1|:19' 
-- Equation name is 'MEMA2', type is output 
 MEMA2   = DFFE( _EQ002 $ !_LC058, !_LC124,  VCC,  VCC,  VCC);
  _EQ002 = !_LC098 &  _X001 &  _X002 &  _X003 &  _X004 &  _X005;
  _X001  = EXP(!_LC033 & !_LC040 & !_LC042 & !_LC045 & !_LC056 & !_LC057 & 
              _LC058 & !_LC077 & !_LC081 & !_LC084 & !_LC100 & !_LC110 & 
              RESET);
  _X002  = EXP(!_LC033 & !_LC042 & !_LC045 & !_LC056 & !_LC057 &  _LC058 & 
             !_LC077 & !_LC081 & !_LC084 & !_LC100 & !_LC110 & !_LC113 & 
              RESET);
  _X003  = EXP(!_LC033 & !_LC042 & !_LC056 & !_LC057 &  _LC058 & !_LC077 & 
             !_LC081 & !_LC084 & !_LC093 & !_LC110 & !_LC119 &  RESET);
  _X004  = EXP(!_LC045 &  _LC058 & !MEMA2);
  _X005  = EXP( _LC058 & !MEMA2 & !RESET);