sdhprocess_tb_runtest.do

光纤通信中的SDH数据帧解析及提取的VHDL实现源代码

SetActiveLib -work
comp -include "$DSN\src\packagedefine.vhd" 
comp -include "$DSN\src\sdhheadoutput.vhd" 
comp -include "$DSN\src\dcc1capture.vhd" 
comp -include "$DSN\src\e1f1capture.vhd" 
comp -include "$DSN\src\headdetect.vhd" 
comp -include "$DSN\src\main.vhd" 
comp -include "$DSN\src\TestBench\sdhprocess_TB.vhd" 
asim TESTBENCH_FOR_sdhprocess 
wave 
wave -noreg clk_1944M
wave -noreg clk_10M
wave -noreg datain
wave -noreg E1Dataout
wave -noreg F1Dataout
wave -noreg clk_64K
wave -noreg DCC1Dataout
wave -noreg clk_192K
wave -noreg SDHHeadDataout
# The following lines can be used for timing simulation
# acom <backannotated_vhdl_file_name>
# comp -include "$DSN\src\TestBench\sdhprocess_TB_tim_cfg.vhd" 
# asim TIMING_FOR_sdhprocess