leddongtai.map.eqn

CPLD控制交通灯程序

-- Copyright (C) 1991-2006 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
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-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--count[0] is count[0]
count[0]_p1_out = !count[0] & !count[2] & !flash;
count[0]_or_out = count[0]_p1_out;
count[0]_reg_input = count[0]_or_out;
count[0] = DFFE(count[0]_reg_input, GLOBAL(clock), , , );


--count[2] is count[2]
count[2]_or_out = flash;
count[2]_reg_input = count[2]_or_out;
count[2] = DFFE(count[2]_reg_input, GLOBAL(clock), , , );


--A1L47Q is sel[3]~reg0
A1L47Q_p1_out = !count[2] & count[1] & count[0];
A1L47Q_or_out = A1L47Q_p1_out;
A1L47Q_reg_input = !(A1L47Q_or_out);
A1L47Q = DFFE(A1L47Q_reg_input, GLOBAL(clock), , , );


--count[1] is count[1]
count[1]_p1_out = !count[2] & !count[1] & !flash & count[0];
count[1]_p2_out = !count[2] & count[1] & !flash & !count[0];
count[1]_or_out = count[1]_p1_out # count[1]_p2_out;
count[1]_reg_input = count[1]_or_out;
count[1] = DFFE(count[1]_reg_input, GLOBAL(clock), , , );


--A1L45Q is sel[2]~reg0
A1L45Q_p1_out = !count[2] & count[1] & !count[0];
A1L45Q_or_out = A1L45Q_p1_out;
A1L45Q_reg_input = !(A1L45Q_or_out);
A1L45Q = DFFE(A1L45Q_reg_input, GLOBAL(clock), , , );


--A1L36Q is leddisp[5]~reg0
A1L36Q_p1_out = snl[5] & count[1] & !count[0];
A1L36Q_p2_out = count[1] & count[0] & snh[5];
A1L36Q_p3_out = !count[1] & !count[0] & ewl[5];
A1L36Q_p4_out = !count[1] & count[0] & ewh[5];
A1L36Q_or_out = count[2] # A1L36Q_p1_out # A1L36Q_p2_out # A1L36Q_p3_out # A1L36Q_p4_out;
A1L36Q_reg_input = A1L36Q_or_out;
A1L36Q = DFFE(A1L36Q_reg_input, GLOBAL(clock), , , );


--A1L32Q is leddisp[3]~reg0
A1L32Q_p1_out = snl[3] & count[1] & !count[0];
A1L32Q_p2_out = count[1] & count[0] & snh[3];
A1L32Q_p3_out = !count[1] & !count[0] & ewl[3];
A1L32Q_p4_out = !count[1] & count[0] & ewh[3];
A1L32Q_or_out = count[2] # A1L32Q_p1_out # A1L32Q_p2_out # A1L32Q_p3_out # A1L32Q_p4_out;
A1L32Q_reg_input = A1L32Q_or_out;
A1L32Q = DFFE(A1L32Q_reg_input, GLOBAL(clock), , , );


--A1L28Q is leddisp[1]~reg0
A1L28Q_p1_out = snl[1] & count[1] & !count[0];
A1L28Q_p2_out = count[1] & count[0] & snh[1];
A1L28Q_p3_out = !count[1] & !count[0] & ewl[1];
A1L28Q_p4_out = !count[1] & count[0] & ewh[1];
A1L28Q_or_out = count[2] # A1L28Q_p1_out # A1L28Q_p2_out # A1L28Q_p3_out # A1L28Q_p4_out;
A1L28Q_reg_input = A1L28Q_or_out;
A1L28Q = DFFE(A1L28Q_reg_input, GLOBAL(clock), , , );


--A1L26Q is leddisp[0]~reg0
A1L26Q_p1_out = snl[0] & count[1] & !count[0];
A1L26Q_p2_out = count[1] & count[0] & snh[0];
A1L26Q_p3_out = !count[1] & !count[0] & ewl[0];
A1L26Q_p4_out = !count[1] & count[0] & ewh[0];
A1L26Q_or_out = count[2] # A1L26Q_p1_out # A1L26Q_p2_out # A1L26Q_p3_out # A1L26Q_p4_out;
A1L26Q_reg_input = A1L26Q_or_out;
A1L26Q = DFFE(A1L26Q_reg_input, GLOBAL(clock), , , );


--A1L43Q is sel[1]~reg0
A1L43Q_p1_out = count[0] & !count[2] & !count[1];
A1L43Q_or_out = A1L43Q_p1_out;
A1L43Q_reg_input = !(A1L43Q_or_out);
A1L43Q = DFFE(A1L43Q_reg_input, GLOBAL(clock), , , );


--A1L41Q is sel[0]~reg0
A1L41Q_p1_out = !count[0] & !count[2] & !count[1];
A1L41Q_or_out = A1L41Q_p1_out;
A1L41Q_reg_input = !(A1L41Q_or_out);
A1L41Q = DFFE(A1L41Q_reg_input, GLOBAL(clock), , , );


--A1L38Q is leddisp[6]~reg0
A1L38Q_p1_out = ewh[6] & count[0] & !count[1];
A1L38Q_p2_out = count[0] & count[1] & snh[6];
A1L38Q_p3_out = !count[0] & !count[1] & ewl[6];
A1L38Q_p4_out = !count[0] & count[1] & snl[6];
A1L38Q_or_out = count[2] # A1L38Q_p1_out # A1L38Q_p2_out # A1L38Q_p3_out # A1L38Q_p4_out;
A1L38Q_reg_input = A1L38Q_or_out;
A1L38Q = DFFE(A1L38Q_reg_input, GLOBAL(clock), , , );


--A1L34Q is leddisp[4]~reg0
A1L34Q_p1_out = ewh[4] & count[0] & !count[1];
A1L34Q_p2_out = count[0] & count[1] & snh[4];
A1L34Q_p3_out = !count[0] & !count[1] & ewl[4];
A1L34Q_p4_out = !count[0] & count[1] & snl[4];
A1L34Q_or_out = count[2] # A1L34Q_p1_out # A1L34Q_p2_out # A1L34Q_p3_out # A1L34Q_p4_out;
A1L34Q_reg_input = A1L34Q_or_out;
A1L34Q = DFFE(A1L34Q_reg_input, GLOBAL(clock), , , );


--A1L30Q is leddisp[2]~reg0
A1L30Q_p1_out = ewh[2] & count[0] & !count[1];
A1L30Q_p2_out = count[0] & count[1] & snh[2];
A1L30Q_p3_out = !count[0] & !count[1] & ewl[2];
A1L30Q_p4_out = !count[0] & count[1] & snl[2];
A1L30Q_or_out = count[2] # A1L30Q_p1_out # A1L30Q_p2_out # A1L30Q_p3_out # A1L30Q_p4_out;
A1L30Q_reg_input = A1L30Q_or_out;
A1L30Q = DFFE(A1L30Q_reg_input, GLOBAL(clock), , , );


--~VCC~0 is ~VCC~0
~VCC~0_or_out = GND;
~VCC~0 = !(~VCC~0_or_out);


--clock is clock
--operation mode is input

clock = INPUT();


--flash is flash
--operation mode is input

flash = INPUT();


--ewh[0] is ewh[0]
--operation mode is input

ewh[0] = INPUT();


--ewh[1] is ewh[1]
--operation mode is input

ewh[1] = INPUT();


--ewh[2] is ewh[2]
--operation mode is input

ewh[2] = INPUT();


--ewh[3] is ewh[3]
--operation mode is input

ewh[3] = INPUT();


--ewh[4] is ewh[4]
--operation mode is input

ewh[4] = INPUT();


--ewh[5] is ewh[5]
--operation mode is input

ewh[5] = INPUT();


--ewh[6] is ewh[6]
--operation mode is input

ewh[6] = INPUT();


--ewl[0] is ewl[0]
--operation mode is input

ewl[0] = INPUT();


--ewl[1] is ewl[1]
--operation mode is input

ewl[1] = INPUT();


--ewl[2] is ewl[2]
--operation mode is input

ewl[2] = INPUT();


--ewl[3] is ewl[3]
--operation mode is input

ewl[3] = INPUT();


--ewl[4] is ewl[4]
--operation mode is input

ewl[4] = INPUT();


--ewl[5] is ewl[5]
--operation mode is input

ewl[5] = INPUT();


--ewl[6] is ewl[6]
--operation mode is input

ewl[6] = INPUT();


--snh[0] is snh[0]
--operation mode is input

snh[0] = INPUT();


--snh[1] is snh[1]
--operation mode is input

snh[1] = INPUT();


--snh[2] is snh[2]
--operation mode is input

snh[2] = INPUT();


--snh[3] is snh[3]
--operation mode is input

snh[3] = INPUT();


--snh[4] is snh[4]
--operation mode is input

snh[4] = INPUT();


--snh[5] is snh[5]
--operation mode is input

snh[5] = INPUT();


--snh[6] is snh[6]
--operation mode is input

snh[6] = INPUT();


--snl[0] is snl[0]
--operation mode is input

snl[0] = INPUT();


--snl[1] is snl[1]
--operation mode is input

snl[1] = INPUT();


--snl[2] is snl[2]
--operation mode is input

snl[2] = INPUT();


--snl[3] is snl[3]
--operation mode is input

snl[3] = INPUT();


--snl[4] is snl[4]
--operation mode is input

snl[4] = INPUT();


--snl[5] is snl[5]
--operation mode is input

snl[5] = INPUT();


--snl[6] is snl[6]
--operation mode is input

snl[6] = INPUT();


--dp is dp
--operation mode is output

dp = OUTPUT(~VCC~0);


--sel[3] is sel[3]
--operation mode is output

sel[3] = OUTPUT(A1L47Q);


--sel[2] is sel[2]
--operation mode is output

sel[2] = OUTPUT(A1L45Q);


--leddisp[0] is leddisp[0]
--operation mode is output

leddisp[0] = OUTPUT(A1L26Q);


--leddisp[1] is leddisp[1]
--operation mode is output

leddisp[1] = OUTPUT(A1L28Q);


--leddisp[3] is leddisp[3]
--operation mode is output

leddisp[3] = OUTPUT(A1L32Q);


--leddisp[5] is leddisp[5]
--operation mode is output

leddisp[5] = OUTPUT(A1L36Q);


--sel[0] is sel[0]
--operation mode is output

sel[0] = OUTPUT(A1L41Q);


--sel[1] is sel[1]
--operation mode is output

sel[1] = OUTPUT(A1L43Q);


--leddisp[2] is leddisp[2]
--operation mode is output

leddisp[2] = OUTPUT(A1L30Q);


--leddisp[4] is leddisp[4]
--operation mode is output

leddisp[4] = OUTPUT(A1L34Q);


--leddisp[6] is leddisp[6]
--operation mode is output

leddisp[6] = OUTPUT(A1L38Q);