jiaotongdeng.map.eqn

用VHDL做的交通灯设计

-- Copyright (C) 1991-2005 Altera Corporation
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-- without limitation, that your use is for the sole purpose of 
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--B1_State.s0 is controller:inst|State.s0
--operation mode is normal

B1_State.s0_lut_out = !B1L9;
B1_State.s0 = DFFEAS(B1_State.s0_lut_out, !Clk, !Reset, , B1L51, , , , );


--B1L1 is controller:inst|GA~3
--operation mode is normal

B1L1 = B1_State.s0 # Hold;


--B1_State.s2 is controller:inst|State.s2
--operation mode is normal

B1_State.s2_lut_out = !B1L9 & (B1_State.s2 & B1L5 # !B1_State.s2 & (!B1L21));
B1_State.s2 = DFFEAS(B1_State.s2_lut_out, !Clk, !Reset, , , , , , );


--B1L2 is controller:inst|GB~10
--operation mode is normal

B1L2 = B1_State.s2 & (!Hold);


--B1_State.s1 is controller:inst|State.s1
--operation mode is normal

B1_State.s1_lut_out = B1L61 & !B1L9 & (B1L5 # !B1_State.s2);
B1_State.s1 = DFFEAS(B1_State.s1_lut_out, !Clk, !Reset, , , , , , );


--B1L12 is controller:inst|YA~10
--operation mode is normal

B1L12 = B1_State.s1 & (!Hold);


--B1_State.s3 is controller:inst|State.s3
--operation mode is normal

B1_State.s3_lut_out = !B1L01;
B1_State.s3 = DFFEAS(B1_State.s3_lut_out, !Clk, !Reset, , B1L51, , , , );


--B1L22 is controller:inst|YB~10
--operation mode is normal

B1L22 = B1_State.s3 & (!Hold);


--B1L3 is controller:inst|RA~13
--operation mode is normal

B1L3 = Hold # B1_State.s0 & (!B1_State.s1);


--B1L4 is controller:inst|RB~3
--operation mode is normal

B1L4 = Hold # B1_State.s1 # !B1_State.s0;


--C1_Num[5] is counter:inst1|Num[5]
--operation mode is normal

C1_Num[5]_lut_out = C1L12 & C1_Num[5] # !C1L12 & (C1L1 & C1L21);
C1_Num[5] = DFFEAS(C1_Num[5]_lut_out, Clk, !Reset, , , , , , );


--C1_Num[4] is counter:inst1|Num[4]
--operation mode is normal

C1_Num[4]_lut_out = C1L12 & C1_Num[4] # !C1L12 & (C1L2 & C1L21);
C1_Num[4] = DFFEAS(C1_Num[4]_lut_out, Clk, !Reset, , , , , , );


--C1_Num[3] is counter:inst1|Num[3]
--operation mode is normal

C1_Num[3]_lut_out = C1L12 & C1_Num[3] # !C1L12 & (C1L4 & C1L21);
C1_Num[3] = DFFEAS(C1_Num[3]_lut_out, Clk, !Reset, , , , , , );


--C1_Num[2] is counter:inst1|Num[2]
--operation mode is normal

C1_Num[2]_lut_out = C1L12 & C1_Num[2] # !C1L12 & (C1L6 & C1L21);
C1_Num[2] = DFFEAS(C1_Num[2]_lut_out, Clk, !Reset, , , , , , );


--C1_Num[1] is counter:inst1|Num[1]
--operation mode is normal

C1_Num[1]_lut_out = C1L12 & C1_Num[1] # !C1L12 & (C1L8 & C1L21);
C1_Num[1] = DFFEAS(C1_Num[1]_lut_out, Clk, !Reset, , , , , , );


--C1_Num[0] is counter:inst1|Num[0]
--operation mode is normal

C1_Num[0]_lut_out = C1L12 & C1_Num[0] # !C1L12 & (C1L01 & C1L21);
C1_Num[0] = DFFEAS(C1_Num[0]_lut_out, Clk, !Reset, , , , , , );


--B1L8 is controller:inst|Select~500
--operation mode is normal

B1L8 = !C1_Num[3] & !C1_Num[2] & !C1_Num[1] & !C1_Num[0];


--B1L9 is controller:inst|Select~501
--operation mode is normal

B1L9 = B1_State.s3 & B1L8 & !C1_Num[5] & !C1_Num[4];


--B1L6 is controller:inst|reduce_nor~59
--operation mode is normal

B1L6 = C1_Num[3] & C1_Num[0] & (!C1_Num[1]);


--B1L5 is controller:inst|reduce_nor~2
--operation mode is normal

B1L5 = C1_Num[4] # !B1L6 # !C1_Num[2] # !C1_Num[5];


--B1L01 is controller:inst|Select~502
--operation mode is normal

B1L01 = B1L5 # !B1_State.s2;


--B1L11 is controller:inst|Select~503
--operation mode is normal

B1L11 = C1_Num[4] & (!C1_Num[5]);


--B1L21 is controller:inst|Select~504
--operation mode is normal

B1L21 = C1_Num[2] # !B1L11 # !B1L6 # !B1_State.s1;


--B1L31 is controller:inst|Select~505
--operation mode is normal

B1L31 = !C1_Num[3] & !C1_Num[1] & !C1_Num[0];


--B1L41 is controller:inst|Select~506
--operation mode is normal

B1L41 = C1_Num[2] & B1L31 & B1L11 & !B1_State.s0;


--B1L51 is controller:inst|Select~507
--operation mode is normal

B1L51 = B1L9 $ B1L01 $ B1L21 $ B1L41;


--B1L7 is controller:inst|reduce_nor~60
--operation mode is normal

B1L7 = C1_Num[2] # C1_Num[1] # !C1_Num[0] # !C1_Num[3];


--B1L61 is controller:inst|Select~509
--operation mode is normal

B1L61 = B1_State.s1 & (B1L7 # !B1L11) # !B1_State.s1 & (B1L41);


--C1L1 is counter:inst1|add~124
--operation mode is normal

C1L1_carry_eqn = C1L3;
C1L1 = C1_Num[5] $ (C1L1_carry_eqn);


--C1L2 is counter:inst1|add~129
--operation mode is arithmetic

C1L2_carry_eqn = C1L5;
C1L2 = C1_Num[4] $ (!C1L2_carry_eqn);

--C1L3 is counter:inst1|add~131
--operation mode is arithmetic

C1L3 = CARRY(C1_Num[4] & (!C1L5));


--C1L4 is counter:inst1|add~134
--operation mode is arithmetic

C1L4_carry_eqn = C1L7;
C1L4 = C1_Num[3] $ (C1L4_carry_eqn);

--C1L5 is counter:inst1|add~136
--operation mode is arithmetic

C1L5 = CARRY(!C1L7 # !C1_Num[3]);


--C1L6 is counter:inst1|add~139
--operation mode is arithmetic

C1L6_carry_eqn = C1L9;
C1L6 = C1_Num[2] $ (!C1L6_carry_eqn);

--C1L7 is counter:inst1|add~141
--operation mode is arithmetic

C1L7 = CARRY(C1_Num[2] & (!C1L9));


--C1L8 is counter:inst1|add~144
--operation mode is arithmetic

C1L8_carry_eqn = C1L11;
C1L8 = C1_Num[1] $ (C1L8_carry_eqn);

--C1L9 is counter:inst1|add~146
--operation mode is arithmetic

C1L9 = CARRY(!C1L11 # !C1_Num[1]);


--C1L01 is counter:inst1|add~149
--operation mode is arithmetic

C1L01 = !C1_Num[0];

--C1L11 is counter:inst1|add~151
--operation mode is arithmetic

C1L11 = CARRY(C1_Num[0]);


--C1L21 is counter:inst1|LessThan~56
--operation mode is normal

C1L21 = B1L8 # !C1_Num[4] # !C1_Num[5];


--C1L12 is counter:inst1|Num[5]~733
--operation mode is normal

C1L12 = Hold # C1L02 & C1_Num[4] & C1_Num[5];


--C1L02 is counter:inst1|Num[5]~718
--operation mode is normal

C1L02 = C1_Num[1] # C1_Num[3] # C1_Num[2];


--Hold is Hold
--operation mode is input

Hold = INPUT();


--Clk is Clk
--operation mode is input

Clk = INPUT();


--Reset is Reset
--operation mode is input

Reset = INPUT();


--GA is GA
--operation mode is output

GA = OUTPUT(!B1L1);


--GB is GB
--operation mode is output

GB = OUTPUT(B1L2);


--YA is YA
--operation mode is output

YA = OUTPUT(B1L12);


--YB is YB
--operation mode is output

YB = OUTPUT(B1L22);


--RA is RA
--operation mode is output

RA = OUTPUT(B1L3);


--RB is RB
--operation mode is output

RB = OUTPUT(B1L4);


--num[5] is num[5]
--operation mode is output

num[5] = OUTPUT(C1_Num[5]);


--num[4] is num[4]
--operation mode is output

num[4] = OUTPUT(C1_Num[4]);


--num[3] is num[3]
--operation mode is output

num[3] = OUTPUT(C1_Num[3]);


--num[2] is num[2]
--operation mode is output

num[2] = OUTPUT(C1_Num[2]);


--num[1] is num[1]
--operation mode is output

num[1] = OUTPUT(C1_Num[1]);


--num[0] is num[0]
--operation mode is output

num[0] = OUTPUT(C1_Num[0]);