controller.vhd

用VHDL做的交通灯设计

LIBRARY ieee;
USE ieee.std_logic_1164.all;

ENTITY controller IS
	PORT (Hold, Reset, Clk 	: IN 	  STD_LOGIC;			
		  Num 				: IN  Integer Range 0 To 49;
		  GA,GB,YA,YB,RA,RB :out      STD_LOGIC); 
END controller;
ARCHITECTURE controller_architecture OF controller IS
TYPE STATE_TYPE IS(S0,S1,S2,S3);
SIGNAL State:STATE_TYPE;
BEGIN
Change_State:  		-- 状态机状态转换进程
PROCESS (reset, clk, state, num)	
BEGIN	
	  IF (reset='1')  THEN  state <= S0; 
	  ELSIF  ( falling_edge(clk) ) THEN	--计数器是上升沿改变计数值，此处用下降沿读取
   	CASE  state   IS
		   WHEN   S0  =>  IF  (num=20)   THEN   state <=S1;   END IF;			  	   WHEN   S1  =>  IF  (num=25)   THEN   state <=S2;   END IF;	
	 	   WHEN   S2  =>  IF  (num=45)   THEN   state <=S3;   END IF;	
	  	   WHEN   S3  =>  IF  (num= 0 )   THEN   state <=S0;   END IF;	
   	END CASE;	
	  END IF;
END PROCESS;
Output_Process:		-- 输出值进程 
Process (hold, state)
BEGIN
	If  (hold='1')  Then		-- 出现特殊情况，亮红灯
		RA <= '1'; GA <= '0'; YA <= '0';    
		RB <= '1'; GB <= '0'; YB <= '0'; 			
	Else
		CASE state Is 
		  When  S0	=>	GA <= '1';   YA <= '0';   RA <= '0';
						RB <= '1';   GB <= '0';   YB <= '0';
		  When  S1	=>	GA <= '0';   YA <= '1';   RA <= '0'; 	
						RB <= '1';   GB <= '0';   YB <= '0';
		  When  S2	=>	GA <= '0';   YA <= '0';   RA <= '1'; 
						RB <= '0';   GB <= '1';   YB <= '0';
		  When  S3	=>	GA <= '0';   YA <= '0';   RA <= '1';
		 				RB <= '0';   GB <= '0';   YB <= '1';
		END CASE;
	END IF;
END  Process;

END controller_architecture;