jiaotongdeng.tan.summary

用VHDL做的交通灯设计

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 8.073 ns
From           : Hold
To             : counter:inst1|Num[4]
From Clock     : 
To Clock       : Clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 9.204 ns
From           : controller:inst|State.s1
To             : RB
From Clock     : Clk
To Clock       : 
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 13.522 ns
From           : Hold
To             : GB
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -7.591 ns
From           : Hold
To             : counter:inst1|Num[5]
From Clock     : 
To Clock       : Clk
Failed Paths   : 0

Type           : Clock Setup: 'Clk'
Slack          : N/A
Required Time  : None
Actual Time    : 89.61 MHz ( period = 11.160 ns )
From           : counter:inst1|Num[1]
To             : controller:inst|State.s0
From Clock     : Clk
To Clock       : Clk
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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