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📄 ctrl.map.eqn

📁 quarters2编写的定时器.vhd为源程序
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--displow[0] is displow[0]
--operation mode is normal

displow[0]_lut_out = A1L94 # !displow[0] & !A1L05;
displow[0] = DFFEA(displow[0]_lut_out, clk, res, , A1L64, , );

--A1L71Q is displow[0]~133
--operation mode is normal

A1L71Q = displow[0];


--displow[1] is displow[1]
--operation mode is normal

displow[1]_lut_out = A1L15 # A1L4 & A1L25;
displow[1] = DFFEA(displow[1]_lut_out, clk, res, , A1L64, , );

--A1L91Q is displow[1]~134
--operation mode is normal

A1L91Q = displow[1];


--displow[2] is displow[2]
--operation mode is normal

displow[2]_lut_out = A1L45;
displow[2] = DFFEA(displow[2]_lut_out, clk, res, , A1L64, , );

--A1L12Q is displow[2]~135
--operation mode is normal

A1L12Q = displow[2];


--displow[3] is displow[3]
--operation mode is normal

displow[3]_lut_out = A1L35 # A1L25 & A1L5;
displow[3] = DFFEA(displow[3]_lut_out, clk, res, , A1L64, , );

--A1L32Q is displow[3]~136
--operation mode is normal

A1L32Q = displow[3];


--C2_q[0] is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|q[0]
--operation mode is clrb_cntr

C2_q[0]_lut_out = ((C2L01 $ C2_q[0] & C2L9) # (C2L51 & !C2L9)) & VCC;
C2_q[0] = DFFEA(C2_q[0]_lut_out, clk, res, , , , );

--C2L61Q is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|q[0]~1
--operation mode is clrb_cntr

C2L61Q = C2_q[0];

--C2L3 is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT
--operation mode is clrb_cntr

C2L3 = CARRY(C2_q[0]);


--C2_q[1] is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is clrb_cntr

C2_q[1]_lut_out = ((C2_q[1] $ (C2L01 & C2L3) & C2L9) # (A1L1 & !C2L9)) & VCC;
C2_q[1] = DFFEA(C2_q[1]_lut_out, clk, res, , , , );

--C2L81Q is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|q[1]~2
--operation mode is clrb_cntr

C2L81Q = C2_q[1];

--C2L5 is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT
--operation mode is clrb_cntr

C2L5 = CARRY(C2_q[1] & (C2L3));


--C2_q[2] is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|q[2]
--operation mode is clrb_cntr

C2_q[2]_lut_out = ((C2_q[2] $ (C2L01 & C2L5) & C2L9) # (A1L2 & !C2L9)) & VCC;
C2_q[2] = DFFEA(C2_q[2]_lut_out, clk, res, , , , );

--C2L02Q is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|q[2]~3
--operation mode is clrb_cntr

C2L02Q = C2_q[2];

--C2L7 is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT
--operation mode is clrb_cntr

C2L7 = CARRY(C2_q[2] & (C2L5));


--C2_q[3] is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|q[3]
--operation mode is clrb_cntr

C2_q[3]_lut_out = ((C2_q[3] $ (C2L01 & C2L7) & C2L9) # (A1L3 & !C2L9)) & VCC;
C2_q[3] = DFFEA(C2_q[3]_lut_out, clk, res, , , , );

--C2L22Q is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|q[3]~4
--operation mode is clrb_cntr

C2L22Q = C2_q[3];


--C2L01 is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~177
--operation mode is normal

C2L01 = cn & displow[3] & (displow[1] # displow[2]);

--C2L11 is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~182
--operation mode is normal

C2L11 = cn & displow[3] & (displow[1] # displow[2]);


--A1L92 is LessThan~167
--operation mode is normal

A1L92 = displow[3] # displow[2] # displow[0] # displow[1];

--A1L43 is LessThan~172
--operation mode is normal

A1L43 = displow[3] # displow[2] # displow[0] # displow[1];


--C1_q[1] is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is clrb_cntr

C1_q[1]_lut_out = (C1_q[1] $ (A1L31 & C1L3)) & A1L54;
C1_q[1] = DFFEA(C1_q[1]_lut_out, clk, res, , A1L31, , );

--C1L71Q is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[1]~0
--operation mode is clrb_cntr

C1L71Q = C1_q[1];

--C1L5 is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT
--operation mode is clrb_cntr

C1L5 = CARRY(C1_q[1] & (C1L3));


--C1_q[0] is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[0]
--operation mode is clrb_cntr

C1_q[0]_lut_out = (A1L31 $ C1_q[0]) & A1L54;
C1_q[0] = DFFEA(C1_q[0]_lut_out, clk, res, , A1L31, , );

--C1L51Q is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[0]~1
--operation mode is clrb_cntr

C1L51Q = C1_q[0];

--C1L3 is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT
--operation mode is clrb_cntr

C1L3 = CARRY(C1_q[0]);


--C1_q[2] is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[2]
--operation mode is clrb_cntr

C1_q[2]_lut_out = (C1_q[2] $ (A1L31 & C1L5)) & A1L54;
C1_q[2] = DFFEA(C1_q[2]_lut_out, clk, res, , A1L31, , );

--C1L91Q is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[2]~2
--operation mode is clrb_cntr

C1L91Q = C1_q[2];

--C1L7 is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT
--operation mode is clrb_cntr

C1L7 = CARRY(C1_q[2] & (C1L5));


--A1L03 is LessThan~168
--operation mode is normal

A1L03 = !C1_q[2] & (!C1_q[0] # !C1_q[1]);

--A1L53 is LessThan~173
--operation mode is normal

A1L53 = !C1_q[2] & (!C1_q[0] # !C1_q[1]);


--C1_q[5] is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[5]
--operation mode is clrb_cntr

C1_q[5]_lut_out = (C1_q[5] $ (A1L31 & C1L11)) & A1L54;
C1_q[5] = DFFEA(C1_q[5]_lut_out, clk, res, , A1L31, , );

--C1L52Q is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[5]~3
--operation mode is clrb_cntr

C1L52Q = C1_q[5];


--C1_q[4] is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[4]
--operation mode is clrb_cntr

C1_q[4]_lut_out = (C1_q[4] $ (A1L31 & C1L9)) & A1L54;
C1_q[4] = DFFEA(C1_q[4]_lut_out, clk, res, , A1L31, , );

--C1L32Q is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[4]~4
--operation mode is clrb_cntr

C1L32Q = C1_q[4];

--C1L11 is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT
--operation mode is clrb_cntr

C1L11 = CARRY(C1_q[4] & (C1L9));


--C1_q[3] is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[3]
--operation mode is clrb_cntr

C1_q[3]_lut_out = (C1_q[3] $ (A1L31 & C1L7)) & A1L54;
C1_q[3] = DFFEA(C1_q[3]_lut_out, clk, res, , A1L31, , );

--C1L12Q is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|q[3]~5
--operation mode is clrb_cntr

C1L12Q = C1_q[3];

--C1L9 is lpm_counter:\a:cnt[0]_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT
--operation mode is clrb_cntr

C1L9 = CARRY(C1_q[3] & (C1L7));


--A1L13 is LessThan~169
--operation mode is normal

A1L13 = A1L03 # !C1_q[3] # !C1_q[4] # !C1_q[5];

--A1L63 is LessThan~174
--operation mode is normal

A1L63 = A1L03 # !C1_q[3] # !C1_q[4] # !C1_q[5];


--A1L23 is LessThan~170
--operation mode is normal

A1L23 = C2_q[3] # C2_q[2] # C2_q[0] # C2_q[1];

--A1L73 is LessThan~175
--operation mode is normal

A1L73 = C2_q[3] # C2_q[2] # C2_q[0] # C2_q[1];


--C2L9 is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~1
--operation mode is normal

C2L9 = cn # A1L92 # A1L13 # !A1L23;

--C2L21 is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~183
--operation mode is normal

C2L21 = cn # A1L92 # A1L13 # !A1L23;


--A1L1 is add~213
--operation mode is normal

A1L1 = C2_q[0] $ !C2_q[1];

--A1L6 is add~218
--operation mode is normal

A1L6 = C2_q[0] $ !C2_q[1];


--A1L2 is add~214
--operation mode is normal

A1L2 = C2_q[2] $ (!C2_q[0] & !C2_q[1]);

--A1L7 is add~219
--operation mode is normal

A1L7 = C2_q[2] $ (!C2_q[0] & !C2_q[1]);


--A1L3 is add~215
--operation mode is normal

A1L3 = C2_q[3] $ (!C2_q[2] & !C2_q[0] & !C2_q[1]);

--A1L8 is add~220
--operation mode is normal

A1L8 = C2_q[3] $ (!C2_q[2] & !C2_q[0] & !C2_q[1]);


--A1L94 is rtl~761
--operation mode is normal

A1L94 = A1L23 & !cn & (C2L01 # !A1L92);

--A1L55 is rtl~767
--operation mode is normal

A1L55 = A1L23 & !cn & (C2L01 # !A1L92);


--A1L05 is rtl~762
--operation mode is normal

A1L05 = C2L01 # !cn & !A1L92;

--A1L65 is rtl~768
--operation mode is normal

A1L65 = C2L01 # !cn & !A1L92;


--A1L64 is rtl~2
--operation mode is normal

A1L64 = cn # !A1L13;

--A1L75 is rtl~769
--operation mode is normal

A1L75 = cn # !A1L13;


--A1L15 is rtl~763
--operation mode is normal

A1L15 = A1L92 & !cn & (displow[0] $ !displow[1]);

--A1L85 is rtl~770
--operation mode is normal

A1L85 = A1L92 & !cn & (displow[0] $ !displow[1]);


--A1L4 is add~216
--operation mode is normal

A1L4 = displow[0] $ displow[1];

--A1L9 is add~221
--operation mode is normal

A1L9 = displow[0] $ displow[1];


--A1L25 is rtl~764
--operation mode is normal

A1L25 = cn & (!displow[1] & !displow[2] # !displow[3]);

--A1L95 is rtl~771
--operation mode is normal

A1L95 = cn & (!displow[1] & !displow[2] # !displow[3]);


--A1L33 is LessThan~171
--operation mode is normal

A1L33 = !displow[2] & !displow[0] & !displow[1];

--A1L83 is LessThan~176
--operation mode is normal

A1L83 = !displow[2] & !displow[0] & !displow[1];


--A1L35 is rtl~765
--operation mode is normal

A1L35 = !cn & (displow[3] & (!A1L33) # !displow[3] & A1L23 & A1L33);

--A1L06 is rtl~772
--operation mode is normal

A1L06 = !cn & (displow[3] & (!A1L33) # !displow[3] & A1L23 & A1L33);


--A1L5 is add~217
--operation mode is normal

A1L5 = displow[3] $ (displow[2] & displow[0] & displow[1]);

--A1L01 is add~222
--operation mode is normal

A1L01 = displow[3] $ (displow[2] & displow[0] & displow[1]);


--A1L54 is rtl~1
--operation mode is normal

A1L54 = cn # A1L13;

--A1L16 is rtl~773
--operation mode is normal

A1L16 = cn # A1L13;


--A1L74 is rtl~758
--operation mode is normal

A1L74 = displow[2] & (displow[0] # displow[1]) # !displow[2] & displow[3] & !displow[0] & !displow[1];

--A1L26 is rtl~774
--operation mode is normal

A1L26 = displow[2] & (displow[0] # displow[1]) # !displow[2] & displow[3] & !displow[0] & !displow[1];


--A1L84 is rtl~759
--operation mode is normal

A1L84 = !displow[3] & (displow[2] $ (displow[0] & displow[1]));

--A1L36 is rtl~775
--operation mode is normal

A1L36 = !displow[3] & (displow[2] $ (displow[0] & displow[1]));


--A1L45 is rtl~766
--operation mode is normal

A1L45 = cn & (A1L84) # !cn & A1L74;

--A1L46 is rtl~776
--operation mode is normal

A1L46 = cn & (A1L84) # !cn & A1L74;


--clk is clk
--operation mode is input

clk = INPUT();


--res is res
--operation mode is input

res = INPUT();


--cn is cn
--operation mode is input

cn = INPUT();


--cout is cout
--operation mode is output

cout = OUTPUT(GND);


--low[0] is low[0]
--operation mode is output

low[0] = OUTPUT(displow[0]);


--low[1] is low[1]
--operation mode is output

low[1] = OUTPUT(displow[1]);


--low[2] is low[2]
--operation mode is output

low[2] = OUTPUT(displow[2]);


--low[3] is low[3]
--operation mode is output

low[3] = OUTPUT(displow[3]);


--high[0] is high[0]
--operation mode is output

high[0] = OUTPUT(C2_q[0]);


--high[1] is high[1]
--operation mode is output

high[1] = OUTPUT(C2_q[1]);


--high[2] is high[2]
--operation mode is output

high[2] = OUTPUT(C2_q[2]);


--high[3] is high[3]
--operation mode is output

high[3] = OUTPUT(C2_q[3]);


--A1L31 is cn~26
--operation mode is normal

A1L31 = !cn;


--C2L51 is lpm_counter:disphigh_rtl_0|alt_counter_f10ke:wysi_counter|q[0]~0
--operation mode is normal

C2L51 = !C2_q[0];


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