video.tan.qmsg

显示总线扩展的_VHDL代码

{ "Info" "ITDB_FULL_MIN_TCO_RESULT" "CLK DISPLAYA\[6\] DISPLAYA\[6\]~reg0 15.000 ns register " "Info: Minimum tco from clock CLK to destination pin DISPLAYA\[6\] through register DISPLAYA\[6\]~reg0 is 15.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 10.000 ns + Shortest register " "Info: + Shortest clock path from clock CLK to source register is 10.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK 1 CLK Pin_48 42 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = Pin_48; Fanout = 42; CLK Node = 'CLK'" {  } { { "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" "" "" { Report "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO.quartus_db" { Floorplan "" "" "" { CLK } "NODE_NAME" } } } { "D:/administrator/My Documents/jianhuade VIDEO APP/db2/VIDEO.vhd" "" "" { Text "D:/administrator/My Documents/jianhuade VIDEO APP/db2/VIDEO.vhd" 15 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(6.000 ns) 10.000 ns DISPLAYA\[6\]~reg0 2 REG LC88 4 " "Info: 2: + IC(2.000 ns) + CELL(6.000 ns) = 10.000 ns; Loc. = LC88; Fanout = 4; REG Node = 'DISPLAYA\[6\]~reg0'" {  } { { "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" "" "" { Report "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { CLK DISPLAYA[6]~reg0 } "NODE_NAME" } } } { "D:/administrator/My Documents/jianhuade VIDEO APP/db2/VIDEO.vhd" "" "" { Text "D:/administrator/My Documents/jianhuade VIDEO APP/db2/VIDEO.vhd" 26 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.000 ns 80.00 % " "Info: Total cell delay = 8.000 ns ( 80.00 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 20.00 % " "Info: Total interconnect delay = 2.000 ns ( 20.00 % )" {  } {  } 0}  } { { "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" "" "" { Report "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { CLK DISPLAYA[6]~reg0 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.000 ns + " "Info: + Micro clock to output delay of source is 1.000 ns" {  } { { "D:/administrator/My Documents/jianhuade VIDEO APP/db2/VIDEO.vhd" "" "" { Text "D:/administrator/My Documents/jianhuade VIDEO APP/db2/VIDEO.vhd" 26 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.000 ns + Shortest register pin " "Info: + Shortest register to pin delay is 4.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns DISPLAYA\[6\]~reg0 1 REG LC88 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC88; Fanout = 4; REG Node = 'DISPLAYA\[6\]~reg0'" {  } { { "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" "" "" { Report "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO.quartus_db" { Floorplan "" "" "" { DISPLAYA[6]~reg0 } "NODE_NAME" } } } { "D:/administrator/My Documents/jianhuade VIDEO APP/db2/VIDEO.vhd" "" "" { Text "D:/administrator/My Documents/jianhuade VIDEO APP/db2/VIDEO.vhd" 26 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.000 ns) 4.000 ns DISPLAYA\[6\] 2 PIN Pin_57 0 " "Info: 2: + IC(0.000 ns) + CELL(4.000 ns) = 4.000 ns; Loc. = Pin_57; Fanout = 0; PIN Node = 'DISPLAYA\[6\]'" {  } { { "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" "" "" { Report "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO.quartus_db" { Floorplan "" "" "4.000 ns" { DISPLAYA[6]~reg0 DISPLAYA[6] } "NODE_NAME" } } } { "D:/administrator/My Documents/jianhuade VIDEO APP/db2/VIDEO.vhd" "" "" { Text "D:/administrator/My Documents/jianhuade VIDEO APP/db2/VIDEO.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.000 ns 100.00 % " "Info: Total cell delay = 4.000 ns ( 100.00 % )" {  } {  } 0}  } { { "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" "" "" { Report "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO.quartus_db" { Floorplan "" "" "4.000 ns" { DISPLAYA[6]~reg0 DISPLAYA[6] } "NODE_NAME" } } }  } 0}  } { { "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" "" "" { Report "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { CLK DISPLAYA[6]~reg0 } "NODE_NAME" } } } { "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" "" "" { Report "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "D:/administrator/My Documents/jianhuade VIDEO APP/db2/db/VIDEO.quartus_db" { Floorplan "" "" "4.000 ns" { DISPLAYA[6]~reg0 DISPLAYA[6] } "NODE_NAME" } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1  " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Mon May 10 12:02:41 2004 " "Info: Processing ended: Mon May 10 12:02:41 2004" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" {  } {  } 0}  } {  } 0}