video.tan.qmsg

读屏幕上亮点坐标的VHDL代码

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLK register lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] register lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] 100.0 MHz 10.0 ns Internal " "Info: Clock CLK has Internal fmax of 100.0 MHz between source register lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] and destination register lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] (period= 10.0 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.000 ns + Longest register register " "Info: + Longest register to register delay is 6.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] 1 REG LC71 16 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC71; Fanout = 16; REG Node = 'lpm_counter:VER_COUNT_rtl_0\|dffs\[0\]'" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "" { lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } } { "d:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "d:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(6.000 ns) 6.000 ns lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] 2 REG LC71 16 " "Info: 2: + IC(0.000 ns) + CELL(6.000 ns) = 6.000 ns; Loc. = LC71; Fanout = 16; REG Node = 'lpm_counter:VER_COUNT_rtl_0\|dffs\[0\]'" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.000 ns" { lpm_counter:VER_COUNT_rtl_0|dffs[0] lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } } { "d:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "d:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.000 ns 100.00 % " "Info: Total cell delay = 6.000 ns ( 100.00 % )" {  } {  } 0}  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.000 ns" { lpm_counter:VER_COUNT_rtl_0|dffs[0] lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 6.500 ns + Shortest register " "Info: + Shortest clock path from clock CLK to destination register is 6.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns CLK 1 CLK Pin_36 10 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = Pin_36; Fanout = 10; CLK Node = 'CLK'" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "" { CLK } "NODE_NAME" } } } { "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" "" "" { Text "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(5.000 ns) 6.500 ns lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] 2 REG LC71 16 " "Info: 2: + IC(1.000 ns) + CELL(5.000 ns) = 6.500 ns; Loc. = LC71; Fanout = 16; REG Node = 'lpm_counter:VER_COUNT_rtl_0\|dffs\[0\]'" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.000 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } } { "d:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "d:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.500 ns 84.62 % " "Info: Total cell delay = 5.500 ns ( 84.62 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.000 ns 15.38 % " "Info: Total interconnect delay = 1.000 ns ( 15.38 % )" {  } {  } 0}  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.500 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 6.500 ns - Longest register " "Info: - Longest clock path from clock CLK to source register is 6.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns CLK 1 CLK Pin_36 10 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = Pin_36; Fanout = 10; CLK Node = 'CLK'" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "" { CLK } "NODE_NAME" } } } { "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" "" "" { Text "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(5.000 ns) 6.500 ns lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] 2 REG LC71 16 " "Info: 2: + IC(1.000 ns) + CELL(5.000 ns) = 6.500 ns; Loc. = LC71; Fanout = 16; REG Node = 'lpm_counter:VER_COUNT_rtl_0\|dffs\[0\]'" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.000 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } } { "d:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "d:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.500 ns 84.62 % " "Info: Total cell delay = 5.500 ns ( 84.62 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.000 ns 15.38 % " "Info: Total interconnect delay = 1.000 ns ( 15.38 % )" {  } {  } 0}  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.500 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } }  } 0}  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.500 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } } { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.500 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "2.000 ns + " "Info: + Micro clock to output delay of source is 2.000 ns" {  } { { "d:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "d:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "2.000 ns + " "Info: + Micro setup delay of destination is 2.000 ns" {  } { { "d:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "d:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0}  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.000 ns" { lpm_counter:VER_COUNT_rtl_0|dffs[0] lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } } { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.500 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } } { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.500 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } }  } 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "RCLK " "Info: No valid register-to-register paths exist for clock RCLK" {  } {  } 0}
{ "Info" "ITDB_TSU_RESULT" "DATAOUT\[9\]~reg0 ADDRESSA\[2\] RCLK 10.000 ns register " "Info: tsu for register DATAOUT\[9\]~reg0 (data pin = ADDRESSA\[2\], clock pin = RCLK) is 10.000 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "14.500 ns + Longest pin register " "Info: + Longest pin to register delay is 14.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns ADDRESSA\[2\] 1 PIN Pin_29 35 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = Pin_29; Fanout = 35; PIN Node = 'ADDRESSA\[2\]'" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "" { ADDRESSA[2] } "NODE_NAME" } } } { "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" "" "" { Text "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" 20 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(7.000 ns) 8.500 ns i~1781sexpbal 2 COMB LC5 30 " "Info: 2: + IC(1.000 ns) + CELL(7.000 ns) = 8.500 ns; Loc. = LC5; Fanout = 30; COMB Node = 'i~1781sexpbal'" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { ADDRESSA[2] i~1781sexpbal } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(5.000 ns) 14.500 ns DATAOUT\[9\]~reg0 3 REG LC45 1 " "Info: 3: + IC(1.000 ns) + CELL(5.000 ns) = 14.500 ns; Loc. = LC45; Fanout = 1; REG Node = 'DATAOUT\[9\]~reg0'" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.000 ns" { i~1781sexpbal DATAOUT[9]~reg0 } "NODE_NAME" } } } { "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" "" "" { Text "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" 92 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "12.500 ns 86.21 % " "Info: Total cell delay = 12.500 ns ( 86.21 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 13.79 % " "Info: Total interconnect delay = 2.000 ns ( 13.79 % )" {  } {  } 0}  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "14.500 ns" { ADDRESSA[2] i~1781sexpbal DATAOUT[9]~reg0 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "2.000 ns + " "Info: + Micro setup delay of destination is 2.000 ns" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" "" "" { Text "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" 92 -1 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "RCLK destination 6.500 ns - Shortest register " "Info: - Shortest clock path from clock RCLK to destination register is 6.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns RCLK 1 CLK Pin_35 11 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = Pin_35; Fanout = 11; CLK Node = 'RCLK'" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "" { RCLK } "NODE_NAME" } } } { "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" "" "" { Text "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" 9 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(5.000 ns) 6.500 ns DATAOUT\[9\]~reg0 2 REG LC45 1 " "Info: 2: + IC(1.000 ns) + CELL(5.000 ns) = 6.500 ns; Loc. = LC45; Fanout = 1; REG Node = 'DATAOUT\[9\]~reg0'" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.000 ns" { RCLK DATAOUT[9]~reg0 } "NODE_NAME" } } } { "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" "" "" { Text "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" 92 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.500 ns 84.62 % " "Info: Total cell delay = 5.500 ns ( 84.62 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.000 ns 15.38 % " "Info: Total interconnect delay = 1.000 ns ( 15.38 % )" {  } {  } 0}  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.500 ns" { RCLK DATAOUT[9]~reg0 } "NODE_NAME" } } }  } 0}  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "14.500 ns" { ADDRESSA[2] i~1781sexpbal DATAOUT[9]~reg0 } "NODE_NAME" } } } { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.500 ns" { RCLK DATAOUT[9]~reg0 } "NODE_NAME" } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "RCLK DATAOUT\[0\] i246 16.500 ns register " "Info: tco from clock RCLK to destination pin DATAOUT\[0\] through register i246 is 16.500 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "RCLK source 6.500 ns + Longest register " "Info: + Longest clock path from clock RCLK to source register is 6.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns RCLK 1 CLK Pin_35 11 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = Pin_35; Fanout = 11; CLK Node = 'RCLK'" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "" { RCLK } "NODE_NAME" } } } { "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" "" "" { Text "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" 9 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(5.000 ns) 6.500 ns i246 2 REG LC35 10 " "Info: 2: + IC(1.000 ns) + CELL(5.000 ns) = 6.500 ns; Loc. = LC35; Fanout = 10; REG Node = 'i246'" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.000 ns" { RCLK i246 } "NODE_NAME" } } } { "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" "" "" { Text "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" 92 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.500 ns 84.62 % " "Info: Total cell delay = 5.500 ns ( 84.62 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.000 ns 15.38 % " "Info: Total interconnect delay = 1.000 ns ( 15.38 % )" {  } {  } 0}  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.500 ns" { RCLK i246 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "2.000 ns + " "Info: + Micro clock to output delay of source is 2.000 ns" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" "" "" { Text "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" 92 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.000 ns + Longest register pin " "Info: + Longest register to pin delay is 8.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns i246 1 REG LC35 10 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC35; Fanout = 10; REG Node = 'i246'" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "" { i246 } "NODE_NAME" } } } { "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" "" "" { Text "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" 92 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(7.000 ns) 8.000 ns DATAOUT\[0\] 2 PIN Pin_12 0 " "Info: 2: + IC(1.000 ns) + CELL(7.000 ns) = 8.000 ns; Loc. = Pin_12; Fanout = 0; PIN Node = 'DATAOUT\[0\]'" {  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { i246 DATAOUT[0] } "NODE_NAME" } } } { "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" "" "" { Text "E:/jianhuade VIDEO APP/db1/新建文件夹/VIDEO.vhd" 19 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "7.000 ns 87.50 % " "Info: Total cell delay = 7.000 ns ( 87.50 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.000 ns 12.50 % " "Info: Total interconnect delay = 1.000 ns ( 12.50 % )" {  } {  } 0}  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { i246 DATAOUT[0] } "NODE_NAME" } } }  } 0}  } { { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "6.500 ns" { RCLK i246 } "NODE_NAME" } } } { "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" "" "" { Report "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "E:/jianhuade VIDEO APP/db1/新建文件夹/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { i246 DATAOUT[0] } "NODE_NAME" } } }  } 0}