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📄 video.tan.qmsg

📁 在屏幕上形成矩形的VHDL程序
💻 QMSG
📖 第 1 页 / 共 4 页
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{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLK register lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] register lpm_counter:VER_COUNT_rtl_0\|dffs\[9\] 76.92 MHz 13.0 ns Internal " "Info: Clock CLK has Internal fmax of 76.92 MHz between source register lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] and destination register lpm_counter:VER_COUNT_rtl_0\|dffs\[9\] (period= 13.0 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.000 ns + Longest register register " "Info: + Longest register to register delay is 8.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] 1 REG LC1 11 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC1; Fanout = 11; REG Node = 'lpm_counter:VER_COUNT_rtl_0\|dffs\[0\]'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "" { lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(6.000 ns) 8.000 ns lpm_counter:VER_COUNT_rtl_0\|dffs\[9\] 2 REG LC122 2 " "Info: 2: + IC(2.000 ns) + CELL(6.000 ns) = 8.000 ns; Loc. = LC122; Fanout = 2; REG Node = 'lpm_counter:VER_COUNT_rtl_0\|dffs\[9\]'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { lpm_counter:VER_COUNT_rtl_0|dffs[0] lpm_counter:VER_COUNT_rtl_0|dffs[9] } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.000 ns 75.00 % " "Info: Total cell delay = 6.000 ns ( 75.00 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 25.00 % " "Info: Total interconnect delay = 2.000 ns ( 25.00 % )" {  } {  } 0}  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { lpm_counter:VER_COUNT_rtl_0|dffs[0] lpm_counter:VER_COUNT_rtl_0|dffs[9] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 10.000 ns + Shortest register " "Info: + Shortest clock path from clock CLK to destination register is 10.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK 1 CLK Pin_36 10 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = Pin_36; Fanout = 10; CLK Node = 'CLK'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "" { CLK } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" "" "" { Text "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(6.000 ns) 10.000 ns lpm_counter:VER_COUNT_rtl_0\|dffs\[9\] 2 REG LC122 2 " "Info: 2: + IC(2.000 ns) + CELL(6.000 ns) = 10.000 ns; Loc. = LC122; Fanout = 2; REG Node = 'lpm_counter:VER_COUNT_rtl_0\|dffs\[9\]'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[9] } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.000 ns 80.00 % " "Info: Total cell delay = 8.000 ns ( 80.00 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 20.00 % " "Info: Total interconnect delay = 2.000 ns ( 20.00 % )" {  } {  } 0}  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[9] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 10.000 ns - Longest register " "Info: - Longest clock path from clock CLK to source register is 10.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK 1 CLK Pin_36 10 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = Pin_36; Fanout = 10; CLK Node = 'CLK'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "" { CLK } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" "" "" { Text "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(6.000 ns) 10.000 ns lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] 2 REG LC1 11 " "Info: 2: + IC(2.000 ns) + CELL(6.000 ns) = 10.000 ns; Loc. = LC1; Fanout = 11; REG Node = 'lpm_counter:VER_COUNT_rtl_0\|dffs\[0\]'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.000 ns 80.00 % " "Info: Total cell delay = 8.000 ns ( 80.00 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 20.00 % " "Info: Total interconnect delay = 2.000 ns ( 20.00 % )" {  } {  } 0}  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } }  } 0}  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[9] } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.000 ns + " "Info: + Micro clock to output delay of source is 1.000 ns" {  } { { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "4.000 ns + " "Info: + Micro setup delay of destination is 4.000 ns" {  } { { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0}  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { lpm_counter:VER_COUNT_rtl_0|dffs[0] lpm_counter:VER_COUNT_rtl_0|dffs[9] } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[9] } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } }  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "VERSYNC register lpm_counter:COM_COUNT_rtl_1\|dffs\[0\] register lpm_counter:COM_COUNT_rtl_1\|dffs\[9\] 76.92 MHz 13.0 ns Internal " "Info: Clock VERSYNC has Internal fmax of 76.92 MHz between source register lpm_counter:COM_COUNT_rtl_1\|dffs\[0\] and destination register lpm_counter:COM_COUNT_rtl_1\|dffs\[9\] (period= 13.0 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.000 ns + Longest register register " "Info: + Longest register to register delay is 8.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns lpm_counter:COM_COUNT_rtl_1\|dffs\[0\] 1 REG LC2 11 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC2; Fanout = 11; REG Node = 'lpm_counter:COM_COUNT_rtl_1\|dffs\[0\]'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "" { lpm_counter:COM_COUNT_rtl_1|dffs[0] } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(6.000 ns) 8.000 ns lpm_counter:COM_COUNT_rtl_1\|dffs\[9\] 2 REG LC121 2 " "Info: 2: + IC(2.000 ns) + CELL(6.000 ns) = 8.000 ns; Loc. = LC121; Fanout = 2; REG Node = 'lpm_counter:COM_COUNT_rtl_1\|dffs\[9\]'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { lpm_counter:COM_COUNT_rtl_1|dffs[0] lpm_counter:COM_COUNT_rtl_1|dffs[9] } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.000 ns 75.00 % " "Info: Total cell delay = 6.000 ns ( 75.00 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 25.00 % " "Info: Total interconnect delay = 2.000 ns ( 25.00 % )" {  } {  } 0}  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { lpm_counter:COM_COUNT_rtl_1|dffs[0] lpm_counter:COM_COUNT_rtl_1|dffs[9] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "VERSYNC destination 10.000 ns + Shortest register " "Info: + Shortest clock path from clock VERSYNC to destination register is 10.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns VERSYNC 1 CLK Pin_77 10 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = Pin_77; Fanout = 10; CLK Node = 'VERSYNC'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "" { VERSYNC } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" "" "" { Text "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" 11 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(6.000 ns) 10.000 ns lpm_counter:COM_COUNT_rtl_1\|dffs\[9\] 2 REG LC121 2 " "Info: 2: + IC(2.000 ns) + CELL(6.000 ns) = 10.000 ns; Loc. = LC121; Fanout = 2; REG Node = 'lpm_counter:COM_COUNT_rtl_1\|dffs\[9\]'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { VERSYNC lpm_counter:COM_COUNT_rtl_1|dffs[9] } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.000 ns 80.00 % " "Info: Total cell delay = 8.000 ns ( 80.00 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 20.00 % " "Info: Total interconnect delay = 2.000 ns ( 20.00 % )" {  } {  } 0}  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { VERSYNC lpm_counter:COM_COUNT_rtl_1|dffs[9] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "VERSYNC source 10.000 ns - Longest register " "Info: - Longest clock path from clock VERSYNC to source register is 10.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns VERSYNC 1 CLK Pin_77 10 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = Pin_77; Fanout = 10; CLK Node = 'VERSYNC'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "" { VERSYNC } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" "" "" { Text "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" 11 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(6.000 ns) 10.000 ns lpm_counter:COM_COUNT_rtl_1\|dffs\[0\] 2 REG LC2 11 " "Info: 2: + IC(2.000 ns) + CELL(6.000 ns) = 10.000 ns; Loc. = LC2; Fanout = 11; REG Node = 'lpm_counter:COM_COUNT_rtl_1\|dffs\[0\]'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { VERSYNC lpm_counter:COM_COUNT_rtl_1|dffs[0] } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.000 ns 80.00 % " "Info: Total cell delay = 8.000 ns ( 80.00 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 20.00 % " "Info: Total interconnect delay = 2.000 ns ( 20.00 % )" {  } {  } 0}  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { VERSYNC lpm_counter:COM_COUNT_rtl_1|dffs[0] } "NODE_NAME" } } }  } 0}  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { VERSYNC lpm_counter:COM_COUNT_rtl_1|dffs[9] } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { VERSYNC lpm_counter:COM_COUNT_rtl_1|dffs[0] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.000 ns + " "Info: + Micro clock to output delay of source is 1.000 ns" {  } { { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "4.000 ns + " "Info: + Micro setup delay of destination is 4.000 ns" {  } { { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0}  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { lpm_counter:COM_COUNT_rtl_1|dffs[0] lpm_counter:COM_COUNT_rtl_1|dffs[9] } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { VERSYNC lpm_counter:COM_COUNT_rtl_1|dffs[9] } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { VERSYNC lpm_counter:COM_COUNT_rtl_1|dffs[0] } "NODE_NAME" } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "CLK DETECTOUT lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] 26.000 ns register " "Info: tco from clock CLK to destination pin DETECTOUT through register lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] is 26.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 10.000 ns + Longest register " "Info: + Longest clock path from clock CLK to source register is 10.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK 1 CLK Pin_36 10 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = Pin_36; Fanout = 10; CLK Node = 'CLK'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "" { CLK } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" "" "" { Text "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(6.000 ns) 10.000 ns lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] 2 REG LC1 11 " "Info: 2: + IC(2.000 ns) + CELL(6.000 ns) = 10.000 ns; Loc. = LC1; Fanout = 11; REG Node = 'lpm_counter:VER_COUNT_rtl_0\|dffs\[0\]'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.000 ns 80.00 % " "Info: Total cell delay = 8.000 ns ( 80.00 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 20.00 % " "Info: Total interconnect delay = 2.000 ns ( 20.00 % )" {  } {  } 0}  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.000 ns + " "Info: + Micro clock to output delay of source is 1.000 ns" {  } { { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "15.000 ns + Longest register pin " "Info: + Longest register to pin delay is 15.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns lpm_counter:VER_COUNT_rtl_0\|dffs\[0\] 1 REG LC1 11 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC1; Fanout = 11; REG Node = 'lpm_counter:VER_COUNT_rtl_0\|dffs\[0\]'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "" { lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 256 9 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(6.000 ns) 8.000 ns i134~14 2 COMB LC116 1 " "Info: 2: + IC(2.000 ns) + CELL(6.000 ns) = 8.000 ns; Loc. = LC116; Fanout = 1; COMB Node = 'i134~14'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "8.000 ns" { lpm_counter:VER_COUNT_rtl_0|dffs[0] i134~14 } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" "" "" { Text "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" 70 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.000 ns) 9.000 ns i134~18 3 COMB LC117 1 " "Info: 3: + IC(0.000 ns) + CELL(1.000 ns) = 9.000 ns; Loc. = LC117; Fanout = 1; COMB Node = 'i134~18'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "1.000 ns" { i134~14 i134~18 } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" "" "" { Text "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" 70 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 11.000 ns i134~9 4 COMB LC118 1 " "Info: 4: + IC(0.000 ns) + CELL(2.000 ns) = 11.000 ns; Loc. = LC118; Fanout = 1; COMB Node = 'i134~9'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "2.000 ns" { i134~18 i134~9 } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" "" "" { Text "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" 70 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.000 ns) 15.000 ns DETECTOUT 5 PIN Pin_75 0 " "Info: 5: + IC(0.000 ns) + CELL(4.000 ns) = 15.000 ns; Loc. = Pin_75; Fanout = 0; PIN Node = 'DETECTOUT'" {  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "4.000 ns" { i134~9 DETECTOUT } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" "" "" { Text "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/VIDEO.vhd" 14 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "13.000 ns 86.67 % " "Info: Total cell delay = 13.000 ns ( 86.67 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 13.33 % " "Info: Total interconnect delay = 2.000 ns ( 13.33 % )" {  } {  } 0}  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "15.000 ns" { lpm_counter:VER_COUNT_rtl_0|dffs[0] i134~14 i134~18 i134~9 DETECTOUT } "NODE_NAME" } } }  } 0}  } { { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "10.000 ns" { CLK lpm_counter:VER_COUNT_rtl_0|dffs[0] } "NODE_NAME" } } } { "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" "" "" { Report "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO_cmp.qrpt" Compiler "VIDEO" "UNKNOWN" "V1" "e:/weili_an/桌面/研究生视频信号应用实验资料/视频信号应用实验代码/在屏幕上形成矩形的_VHDL代码/db/VIDEO.quartus_db" { Floorplan "" "" "15.000 ns" { lpm_counter:VER_COUNT_rtl_0|dffs[0] i134~14 i134~18 i134~9 DETECTOUT } "NODE_NAME" } } }  } 0}

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