video.fit.eqn

在屏幕上形成矩形的VHDL程序

--B2_dffs[0] is lpm_counter:VER_COUNT_rtl_0|dffs[0] at LC1
B2_dffs[0]_reg_input = VCC;
B2_dffs[0] = TFFE(B2_dffs[0]_reg_input, CLK, VERSYNC, , );


--B1_dffs[0] is lpm_counter:COM_COUNT_rtl_1|dffs[0] at LC2
B1_dffs[0]_reg_input = VCC;
B1_dffs[0] = TFFE(B1_dffs[0]_reg_input, VERSYNC, COMSYNC, , );


--B2_dffs[1] is lpm_counter:VER_COUNT_rtl_0|dffs[1] at LC3
B2_dffs[1]_or_out = B2_dffs[0];
B2_dffs[1]_reg_input = B2_dffs[1]_or_out;
B2_dffs[1] = TFFE(B2_dffs[1]_reg_input, CLK, VERSYNC, , );


--B1_dffs[1] is lpm_counter:COM_COUNT_rtl_1|dffs[1] at LC4
B1_dffs[1]_or_out = B1_dffs[0];
B1_dffs[1]_reg_input = B1_dffs[1]_or_out;
B1_dffs[1] = TFFE(B1_dffs[1]_reg_input, VERSYNC, COMSYNC, , );


--B2_dffs[2] is lpm_counter:VER_COUNT_rtl_0|dffs[2] at LC5
B2_dffs[2]_p1_out = B2_dffs[1] & B2_dffs[0];
B2_dffs[2]_or_out = B2_dffs[2]_p1_out;
B2_dffs[2]_reg_input = B2_dffs[2]_or_out;
B2_dffs[2] = TFFE(B2_dffs[2]_reg_input, CLK, VERSYNC, , );


--B1_dffs[2] is lpm_counter:COM_COUNT_rtl_1|dffs[2] at LC6
B1_dffs[2]_p1_out = B1_dffs[1] & B1_dffs[0];
B1_dffs[2]_or_out = B1_dffs[2]_p1_out;
B1_dffs[2]_reg_input = B1_dffs[2]_or_out;
B1_dffs[2] = TFFE(B1_dffs[2]_reg_input, VERSYNC, COMSYNC, , );


--B2_dffs[3] is lpm_counter:VER_COUNT_rtl_0|dffs[3] at LC7
B2_dffs[3]_p1_out = B2_dffs[2] & B2_dffs[1] & B2_dffs[0];
B2_dffs[3]_or_out = B2_dffs[3]_p1_out;
B2_dffs[3]_reg_input = B2_dffs[3]_or_out;
B2_dffs[3] = TFFE(B2_dffs[3]_reg_input, CLK, VERSYNC, , );


--B1_dffs[3] is lpm_counter:COM_COUNT_rtl_1|dffs[3] at LC113
B1_dffs[3]_p1_out = B1_dffs[2] & B1_dffs[1] & B1_dffs[0];
B1_dffs[3]_or_out = B1_dffs[3]_p1_out;
B1_dffs[3]_reg_input = B1_dffs[3]_or_out;
B1_dffs[3] = TFFE(B1_dffs[3]_reg_input, VERSYNC, COMSYNC, , );


--B2_dffs[4] is lpm_counter:VER_COUNT_rtl_0|dffs[4] at LC114
B2_dffs[4]_p1_out = B2_dffs[3] & B2_dffs[2] & B2_dffs[1] & B2_dffs[0];
B2_dffs[4]_or_out = B2_dffs[4]_p1_out;
B2_dffs[4]_reg_input = B2_dffs[4]_or_out;
B2_dffs[4] = TFFE(B2_dffs[4]_reg_input, CLK, VERSYNC, , );


--B1_dffs[4] is lpm_counter:COM_COUNT_rtl_1|dffs[4] at LC115
B1_dffs[4]_p1_out = B1_dffs[3] & B1_dffs[2] & B1_dffs[1] & B1_dffs[0];
B1_dffs[4]_or_out = B1_dffs[4]_p1_out;
B1_dffs[4]_reg_input = B1_dffs[4]_or_out;
B1_dffs[4] = TFFE(B1_dffs[4]_reg_input, VERSYNC, COMSYNC, , );


--B2_dffs[5] is lpm_counter:VER_COUNT_rtl_0|dffs[5] at LC120
B2_dffs[5]_p1_out = B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[1] & B2_dffs[0];
B2_dffs[5]_or_out = B2_dffs[5]_p1_out;
B2_dffs[5]_reg_input = B2_dffs[5]_or_out;
B2_dffs[5] = TFFE(B2_dffs[5]_reg_input, CLK, VERSYNC, , );


--B1_dffs[5] is lpm_counter:COM_COUNT_rtl_1|dffs[5] at LC119
B1_dffs[5]_p1_out = B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[1] & B1_dffs[0];
B1_dffs[5]_or_out = B1_dffs[5]_p1_out;
B1_dffs[5]_reg_input = B1_dffs[5]_or_out;
B1_dffs[5] = TFFE(B1_dffs[5]_reg_input, VERSYNC, COMSYNC, , );


--B2_dffs[6] is lpm_counter:VER_COUNT_rtl_0|dffs[6] at LC128
B2_dffs[6]_p1_out = B2_dffs[5] & B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[1] & B2_dffs[0];
B2_dffs[6]_or_out = B2_dffs[6]_p1_out;
B2_dffs[6]_reg_input = B2_dffs[6]_or_out;
B2_dffs[6] = TFFE(B2_dffs[6]_reg_input, CLK, VERSYNC, , );


--B1_dffs[6] is lpm_counter:COM_COUNT_rtl_1|dffs[6] at LC127
B1_dffs[6]_p1_out = B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[1] & B1_dffs[0];
B1_dffs[6]_or_out = B1_dffs[6]_p1_out;
B1_dffs[6]_reg_input = B1_dffs[6]_or_out;
B1_dffs[6] = TFFE(B1_dffs[6]_reg_input, VERSYNC, COMSYNC, , );


--B2_dffs[7] is lpm_counter:VER_COUNT_rtl_0|dffs[7] at LC126
B2_dffs[7]_p1_out = B2_dffs[6] & B2_dffs[5] & B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[1] & B2_dffs[0];
B2_dffs[7]_or_out = B2_dffs[7]_p1_out;
B2_dffs[7]_reg_input = B2_dffs[7]_or_out;
B2_dffs[7] = TFFE(B2_dffs[7]_reg_input, CLK, VERSYNC, , );


--B1_dffs[7] is lpm_counter:COM_COUNT_rtl_1|dffs[7] at LC125
B1_dffs[7]_p1_out = B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[1] & B1_dffs[0];
B1_dffs[7]_or_out = B1_dffs[7]_p1_out;
B1_dffs[7]_reg_input = B1_dffs[7]_or_out;
B1_dffs[7] = TFFE(B1_dffs[7]_reg_input, VERSYNC, COMSYNC, , );


--B2_dffs[8] is lpm_counter:VER_COUNT_rtl_0|dffs[8] at LC124
B2_dffs[8]_p1_out = B2_dffs[7] & B2_dffs[6] & B2_dffs[5] & B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[1] & B2_dffs[0];
B2_dffs[8]_or_out = B2_dffs[8]_p1_out;
B2_dffs[8]_reg_input = B2_dffs[8]_or_out;
B2_dffs[8] = TFFE(B2_dffs[8]_reg_input, CLK, VERSYNC, , );


--B1_dffs[8] is lpm_counter:COM_COUNT_rtl_1|dffs[8] at LC123
B1_dffs[8]_p1_out = B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[1] & B1_dffs[0];
B1_dffs[8]_or_out = B1_dffs[8]_p1_out;
B1_dffs[8]_reg_input = B1_dffs[8]_or_out;
B1_dffs[8] = TFFE(B1_dffs[8]_reg_input, VERSYNC, COMSYNC, , );


--B2_dffs[9] is lpm_counter:VER_COUNT_rtl_0|dffs[9] at LC122
B2_dffs[9]_p1_out = B2_dffs[8] & B2_dffs[7] & B2_dffs[6] & B2_dffs[5] & B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[1] & B2_dffs[0];
B2_dffs[9]_or_out = B2_dffs[9]_p1_out;
B2_dffs[9]_reg_input = B2_dffs[9]_or_out;
B2_dffs[9] = TFFE(B2_dffs[9]_reg_input, CLK, VERSYNC, , );


--B1_dffs[9] is lpm_counter:COM_COUNT_rtl_1|dffs[9] at LC121
B1_dffs[9]_p1_out = B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[1] & B1_dffs[0];
B1_dffs[9]_or_out = B1_dffs[9]_p1_out;
B1_dffs[9]_reg_input = B1_dffs[9]_or_out;
B1_dffs[9] = TFFE(B1_dffs[9]_reg_input, VERSYNC, COMSYNC, , );


--A1L4 is i134~9 at LC118
A1L4_p0_out = !B1_dffs[5] & !B1_dffs[4] & !B1_dffs[1] & !B1_dffs[0] & !B1_dffs[3] & !B1_dffs[2];
A1L4_p1_out = B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[6] & B2_dffs[8] & B2_dffs[7];
A1L4_p2_out = B2_dffs[6] & B2_dffs[8] & B2_dffs[7] & B2_dffs[5];
A1L4_or_out = A1L6 # A1L4_p0_out # A1L4_p1_out # A1L4_p2_out # !B1_dffs[6] # B1_dffs[5];
A1L4 = !(A1L4_or_out);


--A1L5 is i134~14 at LC116
A1L5_p1_out = !B2_dffs[8] & !B2_dffs[7];
A1L5_p2_out = !B2_dffs[8] & !B2_dffs[1] & !B2_dffs[4] & !B2_dffs[3] & !B2_dffs[2] & !B2_dffs[6] & !B2_dffs[5] & !B2_dffs[0];
A1L5_p3_out = B1_dffs[4] & B1_dffs[3];
A1L5 = A1L5_p1_out # A1L5_p2_out # A1L5_p3_out;


--A1L6 is i134~18 at LC117
A1L6_p1_out = B1_dffs[4] & B1_dffs[2];
A1L6 = A1L5 # B1_dffs[7] # A1L6_p1_out # B2_dffs[9] # B1_dffs[9] # B1_dffs[8];


--CLK is CLK at Pin_36
--operation mode is input

CLK = INPUT();


--COMSYNC is COMSYNC at Pin_76
--operation mode is input

COMSYNC = INPUT();


--VERSYNC is VERSYNC at Pin_77
--operation mode is input

VERSYNC = INPUT();


--DETECTOUT is DETECTOUT at Pin_75
--operation mode is output

DETECTOUT = OUTPUT(A1L4);