prev_cmp_serial_uart_top.sim.qmsg

来自「FPGA Cycloneii 系列的」· QMSG 代码 · 共 22 行

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Simulator Quartus II " "Info: Running Quartus II Simulator" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.1 Build 156 04/30/2007 SJ Full Version " "Info: Version 7.1 Build 156 04/30/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Mar 27 14:42:08 2008 " "Info: Processing started: Thu Mar 27 14:42:08 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sim --read_settings_files=on --write_settings_files=off serial_uart_top -c serial_uart_top " "Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off serial_uart_top -c serial_uart_top" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISDB_SOURCE_VECTOR_FILE_USED" "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf " "Info: Using vector source file \"C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf\"" {  } {  } 0 0 "Using vector source file \"%1!s!\"" 0 0 "" 0}
{ "Warning" "WSIM_MACHINE_BIT_NOT_FOUND" "\|serial_uart_top\|uart_top:inst\|uart_core:inst\|uart_state.UART_LOAD " "Warning: Can't display state machine states -- register holding state machine bit \"\|serial_uart_top\|uart_top:inst\|uart_core:inst\|uart_state.UART_LOAD\" was synthesized away" {  } { { "uart_core.v" "" { Text "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/uart_core.v" 57 -1 0 } }  } 0 0 "Can't display state machine states -- register holding state machine bit \"%1!s!\" was synthesized away" 0 0 "" 0}
{ "Warning" "WSIM_MACHINE_BIT_NOT_FOUND" "\|serial_uart_top\|uart_top:inst\|uart_core:inst\|uart_state.UART_SEND " "Warning: Can't display state machine states -- register holding state machine bit \"\|serial_uart_top\|uart_top:inst\|uart_core:inst\|uart_state.UART_SEND\" was synthesized away" {  } { { "uart_core.v" "" { Text "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/uart_core.v" 57 -1 0 } }  } 0 0 "Can't display state machine states -- register holding state machine bit \"%1!s!\" was synthesized away" 0 0 "" 0}
{ "Warning" "WSIM_MACHINE_BIT_NOT_FOUND" "\|serial_uart_top\|uart_top:inst\|uart_core:inst\|uart_state.UART_END_SEND " "Warning: Can't display state machine states -- register holding state machine bit \"\|serial_uart_top\|uart_top:inst\|uart_core:inst\|uart_state.UART_END_SEND\" was synthesized away" {  } { { "uart_core.v" "" { Text "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/uart_core.v" 57 -1 0 } }  } 0 0 "Can't display state machine states -- register holding state machine bit \"%1!s!\" was synthesized away" 0 0 "" 0}
{ "Warning" "WSIM_NO_INAME_FOR_CHANNEL" "bd_clk " "Warning: Ignored node in vector source file. Can't find corresponding node name \"bd_clk\" in design." {  } { { "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "" { Waveform "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "bd_clk" "0 ps" "0 ps" "" } }  } 0 0 "Ignored node in vector source file. Can't find corresponding node name \"%1!s!\" in design." 0 0 "" 0}
{ "Warning" "WSIM_NO_INAME_FOR_CHANNEL" "recv_bus\[7\] " "Warning: Ignored node in vector source file. Can't find corresponding node name \"recv_bus\[7\]\" in design." {  } { { "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "" { Waveform "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "recv_bus\[7\]" "0 ps" "0 ps" "" } }  } 0 0 "Ignored node in vector source file. Can't find corresponding node name \"%1!s!\" in design." 0 0 "" 0}
{ "Warning" "WSIM_NO_INAME_FOR_CHANNEL" "recv_bus\[6\] " "Warning: Ignored node in vector source file. Can't find corresponding node name \"recv_bus\[6\]\" in design." {  } { { "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "" { Waveform "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "recv_bus\[6\]" "0 ps" "0 ps" "" } }  } 0 0 "Ignored node in vector source file. Can't find corresponding node name \"%1!s!\" in design." 0 0 "" 0}
{ "Warning" "WSIM_NO_INAME_FOR_CHANNEL" "recv_bus\[5\] " "Warning: Ignored node in vector source file. Can't find corresponding node name \"recv_bus\[5\]\" in design." {  } { { "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "" { Waveform "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "recv_bus\[5\]" "0 ps" "0 ps" "" } }  } 0 0 "Ignored node in vector source file. Can't find corresponding node name \"%1!s!\" in design." 0 0 "" 0}
{ "Warning" "WSIM_NO_INAME_FOR_CHANNEL" "recv_bus\[4\] " "Warning: Ignored node in vector source file. Can't find corresponding node name \"recv_bus\[4\]\" in design." {  } { { "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "" { Waveform "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "recv_bus\[4\]" "0 ps" "0 ps" "" } }  } 0 0 "Ignored node in vector source file. Can't find corresponding node name \"%1!s!\" in design." 0 0 "" 0}
{ "Warning" "WSIM_NO_INAME_FOR_CHANNEL" "recv_bus\[3\] " "Warning: Ignored node in vector source file. Can't find corresponding node name \"recv_bus\[3\]\" in design." {  } { { "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "" { Waveform "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "recv_bus\[3\]" "0 ps" "0 ps" "" } }  } 0 0 "Ignored node in vector source file. Can't find corresponding node name \"%1!s!\" in design." 0 0 "" 0}
{ "Warning" "WSIM_NO_INAME_FOR_CHANNEL" "recv_bus\[2\] " "Warning: Ignored node in vector source file. Can't find corresponding node name \"recv_bus\[2\]\" in design." {  } { { "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "" { Waveform "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "recv_bus\[2\]" "0 ps" "0 ps" "" } }  } 0 0 "Ignored node in vector source file. Can't find corresponding node name \"%1!s!\" in design." 0 0 "" 0}
{ "Warning" "WSIM_NO_INAME_FOR_CHANNEL" "recv_bus\[1\] " "Warning: Ignored node in vector source file. Can't find corresponding node name \"recv_bus\[1\]\" in design." {  } { { "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "" { Waveform "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "recv_bus\[1\]" "0 ps" "0 ps" "" } }  } 0 0 "Ignored node in vector source file. Can't find corresponding node name \"%1!s!\" in design." 0 0 "" 0}
{ "Warning" "WSIM_NO_INAME_FOR_CHANNEL" "recv_bus\[0\] " "Warning: Ignored node in vector source file. Can't find corresponding node name \"recv_bus\[0\]\" in design." {  } { { "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "" { Waveform "C:/Documents and Settings/Sa_Chan_S/桌面/quartus内部/serial_uart_top/serial_uart_top.vwf" "recv_bus\[0\]" "0 ps" "0 ps" "" } }  } 0 0 "Ignored node in vector source file. Can't find corresponding node name \"%1!s!\" in design." 0 0 "" 0}
{ "Info" "IEDS_MAX_TRANSITION_COUNT" "" "Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled" { { "Info" "IEDS_MAX_TRANSITION_COUNT_EXP" "" "Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements." {  } {  } 0 0 "Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements." 0 0 "" 0}  } {  } 0 0 "Option to preserve fewer signal transitions to reduce memory requirements is enabled" 0 0 "" 0}
{ "Info" "IEDS_SUB_SIMULATION_COUNT" "1 " "Info: Simulation partitioned into 1 sub-simulations" {  } {  } 0 0 "Simulation partitioned into %1!d! sub-simulations" 0 0 "" 0}
{ "Info" "ISIM_SIM_SIMULATION_COVERAGE" "     24.35 % " "Info: Simulation coverage is      24.35 %" {  } {  } 0 0 "Simulation coverage is %1!s!" 0 0 "" 0}
{ "Info" "ISIM_SIM_NUMBER_OF_TRANSITION" "7518 " "Info: Number of transitions in simulation is 7518" {  } {  } 0 0 "Number of transitions in simulation is %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Simulator 0 s 12 s Quartus II " "Info: Quartus II Simulator was successful. 0 errors, 12 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "98 " "Info: Allocated 98 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Mar 27 14:42:10 2008 " "Info: Processing ended: Thu Mar 27 14:42:10 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}