sin_sample.bdf

EP2C CYCONLY 系列的FPGA时钟测试程序

/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2007 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/
(header "graphic" (version "1.3"))
(pin
	(input)
	(rect -264 72 -96 88)
	(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
	(text "inclk0" (rect 5 0 33 12)(font "Arial" ))
	(pt 168 8)
	(drawing
		(line (pt 92 12)(pt 117 12)(line_width 1))
		(line (pt 92 4)(pt 117 4)(line_width 1))
		(line (pt 121 8)(pt 168 8)(line_width 1))
		(line (pt 92 12)(pt 92 4)(line_width 1))
		(line (pt 117 4)(pt 121 8)(line_width 1))
		(line (pt 117 12)(pt 121 8)(line_width 1))
	)
	(text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
	(annotation_block (location)(rect -312 88 -264 104))
)
(pin
	(output)
	(rect 728 80 904 96)
	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
	(text "data_da[13..0]" (rect 90 0 160 12)(font "Arial" ))
	(pt 0 8)
	(drawing
		(line (pt 0 8)(pt 52 8)(line_width 1))
		(line (pt 52 4)(pt 78 4)(line_width 1))
		(line (pt 52 12)(pt 78 12)(line_width 1))
		(line (pt 52 12)(pt 52 4)(line_width 1))
		(line (pt 78 4)(pt 82 8)(line_width 1))
		(line (pt 82 8)(pt 78 12)(line_width 1))
		(line (pt 78 12)(pt 82 8)(line_width 1))
	)
	(annotation_block (location)(rect 904 96 960 296))
)
(symbol
	(rect -48 64 0 96)
	(text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
	(text "inst2" (rect 3 21 26 33)(font "Arial" ))
	(port
		(pt 0 16)
		(input)
		(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
		(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
		(line (pt 0 16)(pt 13 16)(line_width 1))
	)
	(port
		(pt 48 16)
		(output)
		(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
		(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
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		(circle (rect 31 12 39 20)(line_width 1))
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)
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	(rect 312 48 472 128)
	(text "lpm_rom0" (rect 52 1 119 17)(font "Arial" (font_size 10)))
	(text "inst" (rect 8 64 25 76)(font "Arial" ))
	(port
		(pt 0 32)
		(input)
		(text "address[4..0]" (rect 0 0 75 14)(font "Arial" (font_size 8)))
		(text "address[4..0]" (rect 20 26 95 40)(font "Arial" (font_size 8)))
		(line (pt 0 32)(pt 16 32)(line_width 3))
	)
	(port
		(pt 0 48)
		(input)
		(text "clock" (rect 0 0 29 14)(font "Arial" (font_size 8)))
		(text "clock" (rect 26 42 55 56)(font "Arial" (font_size 8)))
		(line (pt 0 48)(pt 16 48)(line_width 1))
	)
	(port
		(pt 160 40)
		(output)
		(text "q[13..0]" (rect 0 0 42 14)(font "Arial" (font_size 8)))
		(text "q[13..0]" (rect 105 34 147 48)(font "Arial" (font_size 8)))
		(line (pt 160 40)(pt 144 40)(line_width 3))
	)
	(drawing
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		(line (pt 144 16)(pt 144 64)(line_width 1))
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		(line (pt 16 42)(pt 22 48)(line_width 1))
		(line (pt 22 48)(pt 16 54)(line_width 1))
	)
)
(block
	(rect 96 40 256 136)
	(text "address_gen" (rect 5 5 80 19)(font "Arial" (font_size 8)))	(text "inst1" (rect 5 82 28 94)(font "Arial" ))	(block_io "clk" (input))
	(block_io "address[4..0]" (output))
	(mapper
		(pt 0 40)
		(input)
		(mapping "clk" "clk_da" )
		(annotation_block (mapping)(rect -24 24 64 56))
	)
	(mapper
		(pt 160 40)
		(output)
		(mapping "address[4..0]" "address[4..0]" )
		(annotation_block (mapping)(rect 264 0 408 32))
	)
)
(block
	(rect 544 160 712 256)
	(text "trans_ad_da" (rect 5 5 76 19)(font "Arial" (font_size 8)))	(text "inst3" (rect 5 82 28 94)(font "Arial" ))	(block_io "data_ad[13..0]" (input))
	(block_io "data_da[13..0]" (output))
	(mapper
		(pt 40 0)
		(input)
		(mapping "data_ad[13..0]" "data_ad[13..0]" )
		(annotation_block (mapping)(rect 600 112 752 144))
	)
	(mapper
		(pt 112 0)
		(output)
		(mapping "data_da[13..0]" "data_da[13..0]" )
		(annotation_block (mapping)(rect 672 112 824 144))
	)
)
(connector
	(text "clk_da" (rect 288 80 319 92)(font "Arial" ))
	(pt 312 96)
	(pt 288 96)
)
(connector
	(text "address[4..0]" (rect 266 64 330 76)(font "Arial" ))
	(pt 312 80)
	(pt 256 80)
	(bus)
)
(connector
	(pt -96 80)
	(pt -48 80)
)
(connector
	(text "clk_da" (rect 58 64 89 76)(font "Arial" ))
	(pt 0 80)
	(pt 96 80)
)
(connector
	(text "data_ad[13..0]" (rect 584 72 644 84)(font "Arial" ))
	(pt 584 88)
	(pt 584 160)
	(bus)
)
(connector
	(pt 656 88)
	(pt 728 88)
	(bus)
)
(connector
	(text "data_da[13..0]" (rect 656 144 716 156)(font "Arial" ))
	(pt 656 160)
	(pt 656 88)
	(bus)
)
(connector
	(pt 472 88)
	(pt 584 88)
	(bus)
)