wv_hwtb_ddr1_top.do

The xapp851.zip archive includes the following subdirectories. The specific contents of each subdi

add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/ddr1_ctrl_i/burst_read_state_r3
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/ddr1_ctrl_i/first_read_state_r2
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/ddr1_ctrl_i/read_write_state_r2
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/ddr1_ctrl_i/read_write_state_r3
add wave -noupdate -divider wr_data_fifo
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/backend_fifo_i/g_wr_data_fifo__0/wr_data_fifo_160/clk90
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/backend_fifo_i/g_wr_data_fifo__0/wr_data_fifo_160/rst
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/backend_fifo_i/g_wr_data_fifo__0/wr_data_fifo_160/app_wdf_data
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/backend_fifo_i/g_wr_data_fifo__0/wr_data_fifo_160/app_mask_data
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/backend_fifo_i/g_wr_data_fifo__0/wr_data_fifo_160/app_wdf_wren
add wave -noupdate -color yellow -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/backend_fifo_i/g_wr_data_fifo__0/wr_data_fifo_160/ctrl_wdf_rden
add wave -noupdate -color yellow -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/backend_fifo_i/g_wr_data_fifo__0/wr_data_fifo_160/ctrl_wdf_rden_270
add wave -noupdate -color yellow -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/backend_fifo_i/g_wr_data_fifo__0/wr_data_fifo_160/ctrl_wdf_rden_90
add wave -noupdate -color {Violet Red} -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/backend_fifo_i/g_wr_data_fifo__0/wr_data_fifo_160/wdf_data
add wave -noupdate -color {Violet Red} -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/backend_fifo_i/g_wr_data_fifo__0/wr_data_fifo_160/mask_data
add wave -noupdate -color {Violet Red} -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/backend_fifo_i/g_wr_data_fifo__0/wr_data_fifo_160/wr_df_almost_full
add wave -noupdate -divider phy_top
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/rst
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/clk0
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/clk90
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/cke
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/ck
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/ad
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/ba
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/cs_n
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/ras_n
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/cas_n
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/we_n
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/dm
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/dq
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/dqs
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_rdy
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_error
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_addr_in
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_bank_in
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_cs_n_in
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_ras_n_in
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_cas_n_in
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_we_n_in
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_wr_data_in
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_wr_en_in
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_wr_dm_in
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_rd_data_o
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_rd_valid_o
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_rd_data
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_wr_data
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_wr_dm
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/state_c
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/state_n
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/addr_i
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/bank_i
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/cke_i
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/cs_n_i
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/ras_n_i
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/cas_n_i
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/we_n_i
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/rd_latency
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/rd_en_in_i
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/rd_en_brst
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/wr_data_i
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/wr_dm_i
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/wr_en_i
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/calib_start0
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/calib_start1
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/calib_done0
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/calib_done1
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/calib_done0_i
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/calib_done1_i
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/error_i
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/rd_rdy
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/addr_init
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/bank_init
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/cke_init
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/cs_n_init
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/ras_n_init
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/cas_n_init
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/we_n_init
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/init_done_i
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/addr_calib
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/bank_calib
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/cs_n_calib
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/ras_n_calib
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/cas_n_calib
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/we_n_calib
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/wr_data_calib
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/wr_en_calib
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/dq_in
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/dq_o
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/dq_t_o
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/dqs_in
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/dqs_o
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/dqs_t_o
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/dm_o
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/dm_t_o
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/rd_en_a
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/rd_en_srl
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/phy_rdy_i
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/burst_length
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/command
add wave -noupdate -divider phy_dq_align
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/g_rd__0/phy_data_read_i/phy_dq_align_i/rst
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/g_rd__0/phy_data_read_i/phy_dq_align_i/clk0
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/g_rd__0/phy_data_read_i/phy_dq_align_i/dqs
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/g_rd__0/phy_data_read_i/phy_dq_align_i/dq
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/g_rd__0/phy_data_read_i/phy_dq_align_i/rd_data
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/g_rd__0/phy_data_read_i/phy_dq_align_i/calib_start
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/g_rd__0/phy_data_read_i/phy_dq_align_i/calib_done
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/g_rd__0/phy_data_read_i/phy_dq_align_i/state_c
add wave -noupdate -format Literal -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/g_rd__0/phy_data_read_i/phy_dq_align_i/state_n
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/g_rd__0/phy_data_read_i/phy_dq_align_i/dqs_dly
add wave -noupdate -format Logic -radix hexadecimal /tb_hwtb_ddr1_top/hwtb_ddr1_top_i/ddr1_top_i/phy_top_i/g_rd__0/phy_data_read_i/phy_dq_align_i/dqs_dly_bufio