vhdl.npl

8 Channel Digital Volt Meter

JDF E
// Created by ISE ver 1.0
PROJECT vhdl
DESIGN vhdl Normal
DEVKIT XCR3256XL CS280
DEVFAM xpla3
FLOW XST VHDL
STIMULUS multi_dvm_tb.vhd Normal
STIMULUS top_level_tb.vhd Normal
MODULE top_level.vhd
MODSTYLE top_level Normal
MODULE upcnt5.vhd
MODSTYLE upcnt5 Normal
MODULE shift8.vhd
MODSTYLE shift8 Normal
MODULE shift16.vhd
MODSTYLE shift16 Normal
MODULE multi_dvm.vhd
MODSTYLE multi_dvm Normal
[STRATEGY-LIST]
Normal=True, 1012331715
[Normal]
p_VhdlSimDesignUnitName=xstvhd, XPLA3, Module VHDL Test Bench.t_MSimulatePostPlace&RouteVhdlModel, 1012331917, TOP_LEVEL_TB