📄 pci_lib.vhd
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--===================================================================------ www.OpenCores.Org - June 2000-- This model adheres to the GNU public license ---- Design units : Functions and procedures used in models---- File name : PCI_LIB.vhd---- Purpose : type conversion functions, read commands file-- procedures---- Limitations : None known---- Errors : None known---- Library : PCI_Lib.vhd---- Dependencies : IEEE.Std_Logic_1164---- Author : Ovidiu Lupas-- olupas@opencores.org---- Simulator : ModelSim EE version 5.2 on a Windows95 PC-- ActiveVHDL 3.1 on a Windows95 PC--===================================================================--------------------------------------------------------------------------- Revision list-- Version Author Date Changes---- 0.1 Ovidiu Lupas June 09, 2000 New model-----------------------------------------------------------------------library IEEE;use IEEE.Std_Logic_1164.all;--package Simulation is-- Definition of the CommandType record array which is used to record -- the commands from the .cmd file type Data_buffer is array(1 to 256) of Std_Logic_Vector(31 downto 0); type Data_Enable is array(1 to 256) of Std_Logic_Vector(3 downto 0); type CommandType is record command : string(1 to 4); addr : Std_Logic_Vector(31 downto 0); data : Data_buffer; data_nr : Integer; enable : Data_Enable; end record;-- Definition of the CommandArray type type which can be used for-- the commands present in .cmd file type CommandArray is array(positive range <>) of CommandType;end Simulation; --========== End of package Simulation =============----library IEEE,STD,work;library work;use work.Simulation.all;use IEEE.Std_Logic_1164.all;use STD.textio.all;--package PCI_Def is -------------------------------------------------------------------- -- convert a character to a value from 0 to 15 -------------------------------------------------------------------- function digit_value( C : Character) return integer; -------------------------------------------------------------------- -- Converts unsigned Std_LOGIC_Vector to Integer, leftmost bit is MSB -- Error message for unknowns (U, X, W, Z, -), converted to 0 -- Verifies whether vector is too long (> 16 bits) -------------------------------------------------------------------- function Vec2Int ( Invector : in Std_Logic_Vector(15 downto 0)) return Integer; -------------------------------------------------------------------- -- Converts unsigned Std_Logic_Vector to Integer, leftmost bit is MSB -- Error message for unknowns (U, X, W, Z, -), converted to 0 -- Verifies whether vector is too long (> 16 bits) -------------------------------------------------------------------- function Byte2Int ( Invector : in Std_Logic_Vector(7 downto 0)) return Integer; -------------------------------------------------------------------- -- Converts unsigned Std_Logic_Vector to Integer, leftmost bit is MSB -- Error message for unknowns (U, X, W, Z, -), converted to 0 -- Verifies whether vector is too long (> 16 bits) -------------------------------------------------------------------- procedure Hex2Bit ( C : in Character; Vector : out Std_Logic_Vector(3 downto 0); Good : out Boolean); -------------------------------------------------------------------- -- Converts Hex characters to binary representation -- Asserts that no unknown value exists at the time of conversion. -------------------------------------------------------------------- procedure Bit2Hex ( Vector : in Std_Logic_Vector(3 downto 0); C : out Character; Good : out Boolean); -------------------------------------------------------------------- -- Converts bit_vector into a hex string -- Asserts that no unknown value exists at the time of conversion. -------------------------------------------------------------------- procedure Vec2Hex ( Value : in Std_Logic_Vector(31 downto 0); result : out String(1 to 8); Good : out Boolean); -------------------------------------------------------------------- -- read a number from the line -- use this if you have hex numbers that are not in VHDL pound-sign format -------------------------------------------------------------------- procedure Read ( L : inout Line; value : out Integer; radix : in Positive); -------------------------------------------------------------------- -- reads a hex value and returns a bit_vector value -------------------------------------------------------------------- procedure ReadHex ( L : inout Line; Value : out Std_Logic_Vector; Good : out Boolean; Enable: out Std_Logic_Vector); -------------------------------------------------------------------- -- Implements the parsing of the cmd file, which specifies the tasks -- that are applied to the processor. -------------------------------------------------------------------- procedure FileParser ( constant file_name : in String; variable Commands : inout CommandArray; variable NumCommands : out Natural; variable ErrFlag : inout Boolean);end PCI_Def; --============== End of package header =================----library IEEE;use IEEE.Std_Logic_1164.all;library std;use std.textio.all;--package body PCI_Def is -------------------------------------------------------------------- -- convert a character to a value from 0 to 15 -------------------------------------------------------------------- function digit_value ( C : Character) return integer is constant not_digit : integer := -999; begin if (C ='X') and (C ='x') then return 15; end if; if (C >= '0') and (C <= '9') then return (Character'pos(C) - Character'pos('0')); elsif (C >= 'a') and (C <= 'f') then return (character'pos(c) - character'pos('a') + 10); elsif (C >= 'A') and (C <= 'F') then return (character'pos(c) - character'pos('A') + 10); else return not_digit; end if; end digit_value; -------------------------------------------------------------------- -------------------------------------------------------------------- function Vec2Int ( InVector : in Std_Logic_Vector(15 downto 0)) return Integer is constant HeaderMsg : String := "To_Integer:"; constant MsgSeverity : Severity_Level := Warning; variable Value : Integer := 0; begin if InVector = "UUUUUUUUUUUUUUUU" then report HeaderMsg&"The input vector is of type 'U'. Converted to 0" severity MsgSeverity; elsif InVector = "XXXXXXXXXXXXXXXX" then report HeaderMsg&"The input vector is of type 'X'. Converted to 0" severity MsgSeverity; elsif InVector = "WWWWWWWWWWWWWWWW" then report HeaderMsg&"The input vector is of type 'W'. Converted to 0" severity MsgSeverity; elsif InVector = "ZZZZZZZZZZZZZZZZ" then report HeaderMsg&"The input vector is of type 'Z'. Converted to 0" severity MsgSeverity; else for i in 0 to 15 loop if (InVector(i) = '1') then Value := Value + (2**I); end if; end loop; end if; return Value; end Vec2Int; -------------------------------------------------------------------- -------------------------------------------------------------------- function Byte2Int ( InVector : in Std_Logic_Vector(7 downto 0)) return Integer is constant HeaderMsg : String := "To_Integer:"; constant MsgSeverity : Severity_Level := Warning; variable Value : Integer := 0; begin for i in 0 to 7 loop if (InVector(i) = '1') then Value := Value + (2**I); end if; end loop; return Value; end Byte2Int; -------------------------------------------------------------------- -------------------------------------------------------------------- procedure Hex2Bit ( C : in Character; Vector : out Std_Logic_Vector(3 downto 0); Good : out Boolean) is variable Good1 : Boolean := false; constant HeaderMsg : String := "Hex2Bit:"; constant MsgSeverity : Severity_Level := Error; begin Good := false; case C is when '0' => Vector := "0000"; Good1 := true; when '1' => Vector := "0001"; Good1 := true; when '2' => Vector := "0010"; Good1 := true; when '3' => Vector := "0011"; Good1 := true; when '4' => Vector := "0100"; Good1 := true; when '5' => Vector := "0101"; Good1 := true; when '6' => Vector := "0110"; Good1 := true; when '7' => Vector := "0111"; Good1 := true; when '8' => Vector := "1000"; Good1 := true; when '9' => Vector := "1001"; Good1 := true; when 'A'|'a' => Vector := "1010"; Good1 := true; when 'B'|'b' => Vector := "1011"; Good1 := true; when 'C'|'c' => Vector := "1100"; Good1 := true; when 'D'|'d' => Vector := "1101"; Good1 := true; when 'E'|'e' => Vector := "1110"; Good1 := true; when 'F'|'f' => Vector := "1111"; Good1 := true; -- extended for std_LOGIC -- when 'U'|'u' => Vector := "UUUU"; Good1 := true; when 'X'|'x' => Vector := "1111"; Good1 := true; when 'Z'|'z' => Vector := "ZZZZ"; Good1 := true; when 'W'|'w' => Vector := "WWWW"; Good1 := true; when 'L'|'l' => Vector := "LLLL"; Good1 := true; when 'H'|'h' => Vector := "HHHH"; Good1 := true; when '-' => Vector := "----"; Good1 := true; when others => Good1 := false; end case; if not Good1 then Vector := "0000"; report HeaderMsg&"Expected a Hex character (0-F)" severity MsgSeverity; end if; Good := Good1; end Hex2Bit; -------------------------------------------------------------------- -------------------------------------------------------------------- procedure Bit2Hex ( Vector : Std_Logic_Vector(3 downto 0); C : out Character; Good : out Boolean) is variable Good1 : Boolean := false; constant HeaderMsg : String := "Bit2Hex: "; constant MsgSeverity : Severity_Level := Error; begin Good := false; case Vector is
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