full_adder.fit.qmsg

八位全加器

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 215 05/29/2008 SJ Full Version " "Info: Version 8.0 Build 215 05/29/2008 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Nov 30 13:13:36 2008 " "Info: Processing started: Sun Nov 30 13:13:36 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off full_adder -c full_adder " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off full_adder -c full_adder" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "full_adder EP1C6Q240C8 " "Info: Selected device EP1C6Q240C8 for design \"full_adder\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP1C12Q240C8 " "Info: Device EP1C12Q240C8 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 0}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0 0}
{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "2 " "Info: Fitter converted 2 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~nCSO~ 24 " "Info: Pin ~nCSO~ is reserved at location 24" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { ~nCSO~ } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~nCSO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 0} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ASDO~ 37 " "Info: Pin ~ASDO~ is reserved at location 37" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { ~ASDO~ } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~ASDO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "" 0 0}
{ "Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "16 16 " "Warning: No exact pin location assignment(s) for 16 pins of 16 total pins" { { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "SIGN " "Info: Pin SIGN not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { SIGN } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 24 448 624 40 "SIGN" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { SIGN } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "Co " "Info: Pin Co not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { Co } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { -16 480 656 0 "Co" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Co } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "S\[3\] " "Info: Pin S\[3\] not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { S[3] } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 440 544 720 456 "S\[3..0\]" "" } { 48 352 480 64 "S\[3\]" "" } { 176 352 480 192 "S\[2\]" "" } { 304 352 480 320 "S\[1\]" "" } { 432 352 480 448 "S\[0\]" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { S[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "S\[2\] " "Info: Pin S\[2\] not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { S[2] } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 440 544 720 456 "S\[3..0\]" "" } { 48 352 480 64 "S\[3\]" "" } { 176 352 480 192 "S\[2\]" "" } { 304 352 480 320 "S\[1\]" "" } { 432 352 480 448 "S\[0\]" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { S[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "S\[1\] " "Info: Pin S\[1\] not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { S[1] } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 440 544 720 456 "S\[3..0\]" "" } { 48 352 480 64 "S\[3\]" "" } { 176 352 480 192 "S\[2\]" "" } { 304 352 480 320 "S\[1\]" "" } { 432 352 480 448 "S\[0\]" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { S[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "S\[0\] " "Info: Pin S\[0\] not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { S[0] } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 440 544 720 456 "S\[3..0\]" "" } { 48 352 480 64 "S\[3\]" "" } { 176 352 480 192 "S\[2\]" "" } { 304 352 480 320 "S\[1\]" "" } { 432 352 480 448 "S\[0\]" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { S[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "OPERATION " "Info: Pin OPERATION not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { OPERATION } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 536 -160 8 552 "OPERATION" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { OPERATION } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "B\[3\] " "Info: Pin B\[3\] not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { B[3] } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 56 -392 -224 72 "B\[3..0\]" "" } { 48 -208 96 64 "B\[3\]" "" } { 176 -208 96 192 "B\[2\]" "" } { 304 -208 96 320 "B\[1\]" "" } { 432 -208 96 448 "B\[0\]" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "B\[2\] " "Info: Pin B\[2\] not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { B[2] } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 56 -392 -224 72 "B\[3..0\]" "" } { 48 -208 96 64 "B\[3\]" "" } { 176 -208 96 192 "B\[2\]" "" } { 304 -208 96 320 "B\[1\]" "" } { 432 -208 96 448 "B\[0\]" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "B\[1\] " "Info: Pin B\[1\] not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { B[1] } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 56 -392 -224 72 "B\[3..0\]" "" } { 48 -208 96 64 "B\[3\]" "" } { 176 -208 96 192 "B\[2\]" "" } { 304 -208 96 320 "B\[1\]" "" } { 432 -208 96 448 "B\[0\]" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "Cin " "Info: Pin Cin not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { Cin } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 552 -160 8 568 "Cin" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Cin } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "B\[0\] " "Info: Pin B\[0\] not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { B[0] } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 56 -392 -224 72 "B\[3..0\]" "" } { 48 -208 96 64 "B\[3\]" "" } { 176 -208 96 192 "B\[2\]" "" } { 304 -208 96 320 "B\[1\]" "" } { 432 -208 96 448 "B\[0\]" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { B[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "A\[0\] " "Info: Pin A\[0\] not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { A[0] } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 8 -328 -160 24 "A\[3..0\]" "" } { 32 -160 256 48 "A\[3\]" "" } { 160 -160 256 176 "A\[2\]" "" } { 416 -160 256 432 "A\[0\]" "" } { 288 -160 256 304 "A\[1\]" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "A\[1\] " "Info: Pin A\[1\] not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { A[1] } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 8 -328 -160 24 "A\[3..0\]" "" } { 32 -160 256 48 "A\[3\]" "" } { 160 -160 256 176 "A\[2\]" "" } { 416 -160 256 432 "A\[0\]" "" } { 288 -160 256 304 "A\[1\]" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "A\[2\] " "Info: Pin A\[2\] not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { A[2] } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 8 -328 -160 24 "A\[3..0\]" "" } { 32 -160 256 48 "A\[3\]" "" } { 160 -160 256 176 "A\[2\]" "" } { 416 -160 256 432 "A\[0\]" "" } { 288 -160 256 304 "A\[1\]" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "A\[3\] " "Info: Pin A\[3\] not assigned to an exact location on the device" {  } { { "d:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "d:/altera/80/quartus/bin/pin_planner.ppl" { A[3] } } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 8 -328 -160 24 "A\[3..0\]" "" } { 32 -160 256 48 "A\[3\]" "" } { 160 -160 256 176 "A\[2\]" "" } { 416 -160 256 432 "A\[0\]" "" } { 288 -160 256 304 "A\[1\]" "" } } } } { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { A[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0}  } {  } 0 0 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins" 0 0 "" 0 0}
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Extra Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Performing register packing on registers with non-logic cell location assignments" 1 0 "" 0 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Extra Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Completed register packing on registers with non-logic cell location assignments" 1 0 "" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0 0 "Completed %1!s!" 0 0 "" 0 0}
{ "Info" "IFYGR_FYGR_GLOBAL_LINES_NEEDED_FOR_TORNADO_DQS" "0 " "Info: DQS I/O pins require 0 global routing resources" {  } {  } 0 0 "DQS I/O pins require %1!d! global routing resources" 0 0 "" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" {  } {  } 0 0 "Completed %1!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_FYGR_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0 0 "Starting register packing" 0 0 "" 0 0}
{ "Info" "ITDC_FITTER_TIMING_ENGINE" "Classic " "Info: Fitter is using the Classic Timing Analyzer" {  } {  } 0 0 "Fitter is using the %1!s! Timing Analyzer" 0 0 "" 0 0}
{ "Info" "ITAN_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." {  } {  } 0 0 "Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." 0 0 "" 0 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Extra Info: Started Fast Input/Output/OE register processing" {  } {  } 1 0 "Started Fast Input/Output/OE register processing" 1 0 "" 0 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Extra Info: Finished Fast Input/Output/OE register processing" {  } {  } 1 0 "Finished Fast Input/Output/OE register processing" 1 0 "" 0 0}
{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0 0 "Fitter is using %2!s! packing mode for logic elements with %1!s! setting for Auto Packed Registers logic option" 0 0 "" 0 0}
{ "Extra Info" "IFSAC_FSAC_START_LUT_IO_RAM_PACKING" "" "Extra Info: Moving registers into I/O cells, LUTs, and RAM blocks to improve timing and density" {  } {  } 1 0 "Moving registers into I/O cells, LUTs, and RAM blocks to improve timing and density" 1 0 "" 0 0}
{ "Info" "IFSAC_FSAC_FINISH_LUT_IO_RAM_PACKING" "" "Info: Finished moving registers into I/O cells, LUTs, and RAM blocks" {  } {  } 0 0 "Finished moving registers into I/O cells, LUTs, and RAM blocks" 0 0 "" 0 0}