📄 controller.vhd
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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity controller is
port( clock : in std_logic; --输入时钟,频率为1Hz
reset : in std_logic; --复位信号,高电平有效
hold : in std_logic; --保持信号,高电平有效
flash : out std_logic; --转换期间的闪烁信号
numA,numB : out integer range 0 to 25;
redA,greenA,yellowA : out std_logic;
redB,greenB,yellowB : out std_logic);
end entity;
architecture behav of controller is
signal countnum : integer range 0 to 50 ;
begin
process(clock)
begin
if reset='1' then --复位信号将计数器清零
countnum<=0;
elsif rising_edge(clock) then
if hold='1' then
flash<='1';
else
flash<='0';
if countnum=59 then --计数到50s时,计数器清零
countnum<=0;
else
countnum<=countnum+1; --正常计数,计脉冲上升沿
end if;
end if;
end if;
end process;
process(clock)
begin
if rising_edge(clock) then
if hold='1' then --hold信号有效期间,两组路灯都为红灯
redA<='1';
redB<='1';
greenA<='0';
greenB<='0';
yellowA<='0';
yellowB<='0';
else --hold无效期间,系统行为:按照一个计数周期(50s)描述灯的动作
if countnum<=24 then --前20s,A灯为绿
numA<=25-countnum;
redA<='0';
greenA<='1';
yellowA<='0';
elsif (countnum<=29) then --21~25s,A灯为黄
numA<=30-countnum;
redA<='0';
greenA<='0';
yellowA<='1';
else
numA<=60-countnum; --26~50s,A灯为红
redA<='1';
greenA<='0';
yellowA<='0';
end if;
if countnum<=29 then --0~25s(A灯为绿、黄期间),B灯为红
numB<=30-countnum;
redB<='1';
greenB<='0';
yellowB<='0';
elsif countnum<=54 then --26~45s,B灯为绿
numB<=55-countnum;
redB<='0';
greenB<='1';
yellowB<='0';
else
numB<=60-countnum; --46~50s期间,B灯为红黄
redB<='0';
greenB<='0';
yellowB<='1';
end if;
end if;
end if;
end process;
end behav;
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