frequency20hz.vhd

实现交通灯控制器的vhdl编程

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity frequency20Hz is
port( clk50M : in std_logic;
      clk20Hz : out std_logic);
end entity;
architecture behav of frequency20Hz is
signal tout : integer range 0 to 1249999;
signal clk: std_logic;
begin
  process(clk50M)
  begin
    if rising_edge(clk50M) then
      if tout=1249999 then   --计数1250000次，输出翻转一次
        tout<=0;
        clk<=not clk;
      else
        tout<=tout+1;
      end if;
    end if;
  end process;
clk20Hz<=clk;
end behav;