mapy.vhd

基于FPGA实现的按键去抖动电路设计

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity mapy is
port( clk,reset : in std_logic;
      din : in std_logic;
      dout : out std_logic);
end entity;
architecture behav of mapy is
type state is (s0,s1,s2,s3);
signal pre_s,next_s : state;
begin
p0: process(clk,reset)
    begin
      if reset='1' then
        pre_s<=s0;
      elsif rising_edge(clk) then
        pre_s<=next_s;
      else
        null;
      end if;
    end process;
p1: process(pre_s,next_s,din)
    begin
      case pre_s is
         when s0=>
           dout<='1';
           if din='1' then
             next_s<=s1;
           else
             next_s<=s0;
           end if;
         when s1=>
           dout<='1';
           if din='1' then
             next_s<=s0;
           else
             next_s<=s2;
           end if;
         when s2=>
           dout<='1';
           if din='1' then
             next_s<=s0;
           else
             next_s<=s3;
           end if;
         when s3=>
           dout<='0';
           if din='1' then
             next_s<=s0;
           else
             next_s<=s1;
           end if;
       end case;
     end process;
end behav;