📄 post_20b15i.vhd
字号:
------------------------------------------------------------- File: post.vhd ---- created : July 09,2001 15:00 ---- mail to khaer@opencores.org -------------------------------------------------------------library IEEE;use IEEE.std_logic_1164.all;use IEEE.STD_LOGIC_ARITH.all;use IEEE.STD_LOGIC_SIGNED.all;entity post_20b15i is port ( clk : in STD_LOGIC; scaled_radius : in STD_LOGIC_VECTOR (19 downto 0); input_angle : in STD_LOGIC_VECTOR (18 downto 0); angle : out STD_LOGIC_VECTOR (19 downto 0); octant : in STD_LOGIC_VECTOR (2 downto 0); radius : out STD_LOGIC_VECTOR (19 downto 0) );end post_20b15i;architecture post_20b15i of post_20b15i is signal tmp1,tmp2,tmp3,tmp4 : std_logic_vector (20 downto 0); signal in_angl,ang3 : std_logic_vector (19 downto 0);signal ang2,ang1 : std_logic_vector (18 downto 0); signal o0,o1 : std_logic_vector (2 downto 0); signal ang : std_logic_vector (19 downto 0); begin process(clk) variable ang : std_logic_vector (19 downto 0); variable pi2 : std_logic_vector (19 downto 0); variable pi : std_logic_vector (19 downto 0); variable acc : std_logic_vector (20 downto 0); variable add : std_logic_vector (20 downto 0); begin if clk'event and clk='1' then o0 <= octant; o1 <= o0; ang1 <= input_angle; ang2 <= ang1; ang := o1(2) & o1(1) & "000000000000000000"; if o1(0) = '0' then angle <= ang + sxt(ang2, 20); else angle <= ang - sxt(ang2, 20); end if; -- approximation of 0,858785337-- 1-((1/8+1/64)+(1/8+1/64)/256+(1/8+1/64)/4096)=0,858791351-- this is an 0,0000060147 error acc := (scaled_radius & '0'); add := "000" & scaled_radius(19 downto 2); tmp1 <= add+("000000" & scaled_radius(19 downto 5)); tmp2 <= acc; tmp3 <= tmp1+("00000000" & tmp1(20 downto 8)); tmp4 <= tmp2-("000000000000" & tmp1(20 downto 12)); acc := tmp4-tmp3; radius <= acc(20 downto 1); end if; end process; end post_20b15i;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -