config_controller.tdf

IIR、FIR、FFT各模块程序设计例程

  -- DATA0 is the value that is driven out the tri-statable pld_DATA0 pin.
  DATA0 = (load & D[0]) # (!load & The_Shift_Register.shiftout); 


  ----------------
  -- "Safe Config" input button
  --
  -- Debounce the safe-config switch and test for rising edges.
  -- 
  -- Also, if we see a rising edge, remember it.  Forever.  (OK, until
  -- true RESET_n input comes along, or until the FPGA requests a 
  -- configuration)
  -- 
  --
  -- Also, put a synchronization register on the config_request input.
  --
  sync_config_request.d   = !config_request_n;

  d1_safe_config.d        = !safe_config_n;     -- Button is active-low
  d2_safe_config.d        = d1_safe_config.q;
  safe_config_rising_edge = d1_safe_config.q & !d2_safe_config.q;

  cause_was_safe_config.d = safe_config_rising_edge #
                            (cause_was_safe_config.q &
                             !sync_config_request.q);
-- ph: 030219. check if sync_config_request needed, above.

  ----------------
  -- Forced-reset pulse
  --
  -- Resets can come from one of three sources:
  --    1) The RESET_n input, which comes from a Maxim power-sense
  --       and reset-pulse-generation chip (spiffy).  This chip
  --       delivers a guaranteed-clean pulse with a
  --       fixed-and-reasonable duration.  This pulse occurs when
  --       the power-supplies are stable upoon power-up, or when
  --       the user presses the "Power-On Reset" button.  Nice chip, eh?
  --
  --    2) The FPGA requests a reconfiguration.  We give it a 
  --       courtesy board-level-reset first.  we know when 
  --       this is happening from the "config_request" input.
  --   
  --    3) Somebody presses the "Safe Config" button, causing our
  --       safe_config input to go low.  Again, we provide a courtesy
  --       board-level reset prior to configuring the FPGA.
  --
  --  In cases (2) and (3), the incoming inputs don't come from a
  --  fancy Maxim reset-pluse generator, so the inputs may be 
  --  very-short or unclean.  We want to give our board a nice, long,
  --  clean reset pluse.   Here's where we make that pulse. Its 
  --  length comes from the (relatively-slow-running) Reset_Counter.
  --
  --  The d1/d2 delayed-source registers are enabled by the reset
  --  counter, so the reset_source_rising_edge condition will persist
  --  for one full Reset_Counter cycle.
  --   
  reset_source             = safe_config_rising_edge # sync_config_request.q;
  d1_reset_source.d        = reset_source;
  d2_reset_source.d        = d1_reset_source.q;
  reset_source_rising_edge = d1_reset_source.q & !d2_reset_source.q;
        
  Reset_Pulse.d = (!RESET_n # reset_source_rising_edge);
-- JMC Changes
  cf_Reset_Pulse.d = The_CF_Counter.cout;
-- end

  ----------------  
  -- Reset distribution
  --
  --  In addition to its other tasks, the 7128 is used to distribute
  --  the power-on "Master reset" signal to other chips on the board.
  --  easy enough:
  --
  flash_reset_n  = !Reset_Pulse.q;
  enet_reset     =  Reset_Pulse.q;
-- JMC Changes
  proto1_reset_n = The_CF_RST_Counter.q[21];
  --  proto1_reset_n = !Reset_Pulse.q;
-- end
  proto2_reset_n = !Reset_Pulse.q;

  ----------------
  -- Status LEDs
  --
  -- It's just ever so polite to let the user know what state we're in.
  --        
  -- Note that the loading-led is anded with a high-order address
  -- bit.  This makes it blink while counting.
  --        
  -- The user LED indicates either user-configuration from flash or from the
  -- ASMI device.  It blinks if loaded from the ASMI device.
  -- 
  loading_led = (((State_Counting.q & !State_Done.q & !State_Error.q) & 
                  The_Address_Counter.q[16]) # Reset_Pulse.q) -- ...from flash
                # (try_asmi_config.q & !CONFIG_DONE);         -- ...from ASMI

  user_led    = ((!try_asmi_config.q & try_user_config.q & !State_Error.q) #
                 (try_asmi_config.q & CONFIG_DONE & user_led_blinking)) 
                & !State_JTAG_Config.q;

  safe_led    = (!try_asmi_config.q & !try_user_config.q & !State_Error.q 
                & !State_JTAG_Config.q);
                
  error_led   = (State_Error.q & !State_JTAG_Config.q) 
                # (try_asmi_config.q & !STATUS_n); -- flash quickly for failed
                                                   -- failed ASMI 

  user_led_blinking = The_Address_Counter.q[16] #
                      The_Address_Counter.q[17] # 
                      The_Address_Counter.q[18] ;


  ----------------
  -- try_asmi_config register
  --
  -- When the power comes on (as-indicated by RESET_n), we give the 
  -- configuration in the ASMI device -one try-.  If anything goes wrong, 
  -- we then try the user design in flash, then the safe design in flash. 
  --
  -- If there is a valid design in the ASMI device, there will be no way to
  -- load a design out of user-space in flash.  The "safe" design may still be
  -- forced by the "Force Safe" button. 
  -- 
  -- try_asmi_config gets set true (later code) by RESET_n.
  -- It gets cleared when there's an error while loading the design.
  -- 
  -- This bit is always (ALWAYS) false if the reset-cause was
  -- the Safe Config button (cause_was_safe_config).
  -- 

  try_asmi_config.d =   !eek_an_error.q &
                        !cause_was_safe_config & 
                        try_asmi_config.q;
 
  ----------------
  -- Try_User_Config
  --
  -- So, basically, try_user_config latches-and-holds a zero (from
  -- itself).  
  -- 
  -- It gets set     by "eek_an_error" while try_asmi_config.  
  -- It gets cleared by "eek_an_error" while try_user_config.  
  --
  -- This bit is always (ALWAYS) false if the reset-cause was
  -- the Safe Config button (cause_was_safe_config).
  -- 
  -- 
  try_user_config.d  = (try_asmi_config.q & eek_an_error.q) #
                       (!eek_an_error.q & 
                        !cause_was_safe_config &  
                        try_user_config.q);  

  ----------------
  -- State_JTAG_Config
  --
  --  After we're all done, and we've achieved whatever outcome 
  --  (or error) is our fate, we light-up some LEDs to show what 
  --  state the board is in.
  --
  --  The user can always come along later and download an entirely
  --  unknown configuration via JTAG.  After they do this, our 
  --  notion of "what's in the FPGA" is obsolete, and we should
  --  turn off our LEDs that might claim otherwise.
  --
  --  We can tell a user has downloaded a new configuration if:
  --    * We were in State_Error,  and CONFIG_DONE went high.
  --    * We thought we were done, and CONFIG_DONE went away.
  --
  State_JTAG_Config.d = (State_Error.q &  CONFIG_DONE) #
                        (State_Done.q  & !CONFIG_DONE) # 
                        State_JTAG_Config.q           ;      


  ----------------
  -- Restart_Sequence
  -- 
  -- We want to reconfigure the Cyclone when prompted by either or 
  -- two cues:
  --   
  --     * Power-on reset, as-indicated by the RESET_n input.
  --     * An explicit "reconfigure" command (either from the Cyclone or the
  --       "Safe Config" button) from the "config_request" input.
  --     * Error during asmi-mode or user-mode Cyclone configuration.
  --
  -- The Cyclone signals an error by driving STATUS_n low.  If we're in
  -- State_Counting, State_Done, or try_asmi_config, nSTATUS is -supposed-
  -- to be high all the time (if all's well).  If nSTATUS goes low during
  -- configuration, that's the Cyclone's way of saying "Eek!."  In that case we
  -- want to restart the machine.
  -- 
  -- The "eek_an_error" signal gets its own flip-flop because otherwise
  -- this design doesn't fit.
  --
  -- For multi-choice configuration, we also declare an "error" to be:
  -- the counter wrapping (i.e. carrying-out) while we're trying the
  -- user configuration, and before State_Done is true.
  --    
  --
  restart_sequence = Reset_Pulse.q # 
                    (eek_an_error.q & (try_user_config.q # try_asmi_config.q));

  eek_an_error.d     = (!STATUS_n         & (State_Counting.q)) #
                       (counter_wrapped.q & !State_Done.q     );

  ----------------
  -- State_Error means the whole thing was a giant failure.
  -- This can only happen during the factory-config retry cycle
  -- due to one of two circumstances
  --                 1) The chip said STATUS_n during counting.
  --                 2) The counter wrapped.
  --
  -- This condition is only cleared by a master-reset.
  --
  State_Error.d      
        = State_Error.q #  
            (!try_user_config.q & !try_asmi_config &
             ((!STATUS_n & (State_Counting.q)) # 
              counter_wrapped.q
              )
        );

  counter_wrapped.d  = The_Address_Counter.cout # counter_wrapped.q;

  ----------------
  -- Clock connections
  --
  try_asmi_config.clk              = cpld_CLKOSC; 
  CONFIG_n_reg.clk                 = cpld_CLKOSC; 
  State_Waiting_For_STATUS_n.clk   = cpld_CLKOSC; 
  State_Counting.clk               = cpld_CLKOSC; 
  State_Done.clk                   = cpld_CLKOSC;
  State_Error.clk                  = cpld_CLKOSC;
  State_JTAG_Config.clk            = cpld_CLKOSC;
  eek_an_error.clk                 = cpld_CLKOSC;
  try_user_config.clk              = cpld_CLKOSC;
  counter_wrapped.clk              = cpld_CLKOSC;
  d1_safe_config.clk               = cpld_CLKOSC;
  d2_safe_config.clk               = cpld_CLKOSC;
  d1_reset_source.clk              = cpld_CLKOSC;
  d2_reset_source.clk              = cpld_CLKOSC;
  cause_was_safe_config.clk        = cpld_CLKOSC;
  sync_config_request.clk          = cpld_CLKOSC;
  Reset_Pulse.clk                  = cpld_CLKOSC;
  The_Dclk_Divider.clock           = cpld_CLKOSC;
  The_Address_Counter.clock        = cpld_CLKOSC;
-- JMC Changes
  The_CF_RST_Counter.clock         = cpld_CLKOSC;
  The_CF_Counter.clock             = cpld_CLKOSC;
  cf_Reset_Pulse.clk               = cpld_CLKOSC; 
-- end
  The_Reset_Counter.clock          = cpld_CLKOSC;
  The_Data_Bit_Counter.clock       = cpld_CLKOSC;
  The_Shift_Register.clock         = cpld_CLKOSC; 

  ----------------
  -- Reset connections
  --
  try_asmi_config.prn              = !Reset_Pulse.q; 
  try_user_config.clrn             = !Reset_Pulse.q;
  CONFIG_n_reg.clrn                = !restart_sequence; 
  State_Waiting_For_STATUS_n.clrn  = !restart_sequence; 
  State_Counting.clrn              = !restart_sequence; 
  State_Done.clrn                  = !restart_sequence;
  State_Error.clrn                 = !Reset_Pulse.q;
  State_JTAG_Config.clrn           = !Reset_Pulse.q;
  eek_an_error.clrn                = !Reset_Pulse.q;
  counter_wrapped.clrn             = !restart_sequence;