config_controller.eqn

IIR、FIR、FFT各模块程序设计例程

G4_dffs[8]_reg_input = VCC;
G4_dffs[8]_p3_out = G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[8] = TFFE(G4_dffs[8]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[8]_p3_out);


--G4_dffs[7] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[7] at LC125
G4_dffs[7]_reg_input = VCC;
G4_dffs[7]_p3_out = G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[7] = TFFE(G4_dffs[7]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[7]_p3_out);


--G4_dffs[6] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[6] at LC114
G4_dffs[6]_reg_input = VCC;
G4_dffs[6]_p3_out = G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[6] = TFFE(G4_dffs[6]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[6]_p3_out);


--G4_dffs[5] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[5] at LC115
G4_dffs[5]_reg_input = VCC;
G4_dffs[5]_p3_out = G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[5] = TFFE(G4_dffs[5]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[5]_p3_out);


--G4_dffs[4] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[4] at LC116
G4_dffs[4]_reg_input = VCC;
G4_dffs[4]_p3_out = G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[4] = TFFE(G4_dffs[4]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[4]_p3_out);


--G4_dffs[3] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[3] at LC118
G4_dffs[3]_reg_input = VCC;
G4_dffs[3]_p3_out = G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[3] = TFFE(G4_dffs[3]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[3]_p3_out);


--G4_dffs[2] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[2] at LC119
G4_dffs[2]_reg_input = VCC;
G4_dffs[2]_p3_out = G4_dffs[1] & G4_dffs[0];
G4_dffs[2] = TFFE(G4_dffs[2]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[2]_p3_out);


--G4_dffs[1] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[1] at LC120
G4_dffs[1]_reg_input = VCC;
G4_dffs[1] = TFFE(G4_dffs[1]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[0]);


--G4_dffs[0] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[0] at LC122
G4_dffs[0]_reg_input = VCC;
G4_dffs[0] = TFFE(G4_dffs[0]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , );


--H1_dffs[1] is shift_register:The_Shift_Register|lpm_shiftreg:lpm_shiftreg_component|dffs[1] at LC100
H1_dffs[1]_p0_out = G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & !D[2] & H1_dffs[2];
H1_dffs[1]_p4_out = G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & D[2] & !H1_dffs[2];
H1_dffs[1]_or_out = H1_dffs[1]_p0_out # H1_dffs[1]_p4_out;
H1_dffs[1]_reg_input = H1_dffs[2] $ H1_dffs[1]_or_out;
H1_dffs[1]_p3_out = State_Counting & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0];
H1_dffs[1] = DFFE(H1_dffs[1]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , H1_dffs[1]_p3_out);


--H1_dffs[2] is shift_register:The_Shift_Register|lpm_shiftreg:lpm_shiftreg_component|dffs[2] at LC11
H1_dffs[2]_p0_out = G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & !D[3] & H1_dffs[3];
H1_dffs[2]_p4_out = G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & D[3] & !H1_dffs[3];
H1_dffs[2]_or_out = H1_dffs[2]_p0_out # H1_dffs[2]_p4_out;
H1_dffs[2]_reg_input = H1_dffs[3] $ H1_dffs[2]_or_out;
H1_dffs[2]_p3_out = State_Counting & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0];
H1_dffs[2] = DFFE(H1_dffs[2]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , H1_dffs[2]_p3_out);


--H1_dffs[3] is shift_register:The_Shift_Register|lpm_shiftreg:lpm_shiftreg_component|dffs[3] at LC2
H1_dffs[3]_p0_out = G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & !D[4] & H1_dffs[4];
H1_dffs[3]_p4_out = G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & D[4] & !H1_dffs[4];
H1_dffs[3]_or_out = H1_dffs[3]_p0_out # H1_dffs[3]_p4_out;
H1_dffs[3]_reg_input = H1_dffs[4] $ H1_dffs[3]_or_out;
H1_dffs[3]_p3_out = State_Counting & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0];
H1_dffs[3] = DFFE(H1_dffs[3]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , H1_dffs[3]_p3_out);


--H1_dffs[4] is shift_register:The_Shift_Register|lpm_shiftreg:lpm_shiftreg_component|dffs[4] at LC4
H1_dffs[4]_p0_out = G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & !D[5] & H1_dffs[5];
H1_dffs[4]_p4_out = G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & D[5] & !H1_dffs[5];
H1_dffs[4]_or_out = H1_dffs[4]_p0_out # H1_dffs[4]_p4_out;
H1_dffs[4]_reg_input = H1_dffs[5] $ H1_dffs[4]_or_out;
H1_dffs[4]_p3_out = State_Counting & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0];
H1_dffs[4] = DFFE(H1_dffs[4]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , H1_dffs[4]_p3_out);


--H1_dffs[5] is shift_register:The_Shift_Register|lpm_shiftreg:lpm_shiftreg_component|dffs[5] at LC12
H1_dffs[5]_p0_out = G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & !D[6] & H1_dffs[6];
H1_dffs[5]_p4_out = G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & D[6] & !H1_dffs[6];
H1_dffs[5]_or_out = H1_dffs[5]_p0_out # H1_dffs[5]_p4_out;
H1_dffs[5]_reg_input = H1_dffs[6] $ H1_dffs[5]_or_out;
H1_dffs[5]_p3_out = State_Counting & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0];
H1_dffs[5] = DFFE(H1_dffs[5]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , H1_dffs[5]_p3_out);


--H1_dffs[6] is shift_register:The_Shift_Register|lpm_shiftreg:lpm_shiftreg_component|dffs[6] at LC103
H1_dffs[6]_p1_out = G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & !D[7];
H1_dffs[6]_or_out = H1_dffs[6]_p1_out;
H1_dffs[6]_reg_input = !(H1_dffs[6]_or_out);
H1_dffs[6]_p3_out = State_Counting & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0];
H1_dffs[6] = DFFE(H1_dffs[6]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , H1_dffs[6]_p3_out);


--~VCC~0 is ~VCC~0 at LC61
~VCC~0_or_out = GND;
~VCC~0 = !(~VCC~0_or_out);


--~VCC~1 is ~VCC~1 at LC62
~VCC~1_or_out = GND;
~VCC~1 = !(~VCC~1_or_out);


--~VCC~2 is ~VCC~2 at LC57
~VCC~2_or_out = GND;
~VCC~2 = !(~VCC~2_or_out);


--~GND~0 is ~GND~0 at LC101
~GND~0_or_out = GND;
~GND~0 = ~GND~0_or_out;


--~VCC~3 is ~VCC~3 at LC69
~VCC~3_or_out = GND;
~VCC~3 = !(~VCC~3_or_out);


--A1L27 is restart_sequence~50bal at LC106
A1L27_p1_out = !Reset_Pulse & !eek_an_error;
A1L27_p2_out = !Reset_Pulse & try_asmi_config & try_user_config;
A1L27_or_out = A1L27_p1_out # A1L27_p2_out;
A1L27 = !(A1L27_or_out);


--CONFIG_DONE is CONFIG_DONE at Pin_85
--operation mode is input

CONFIG_DONE = INPUT();


--STATUS_n is STATUS_n at Pin_92
--operation mode is input

STATUS_n = INPUT();


--cpld_CLKOSC is cpld_CLKOSC at Pin_87
--operation mode is input

cpld_CLKOSC = INPUT();


--RESET_n is RESET_n at Pin_89
--operation mode is input

RESET_n = INPUT();


--D[0] is D[0] at Pin_71
--operation mode is input

D[0] = INPUT();


--config_request_n is config_request_n at Pin_94
--operation mode is input

config_request_n = INPUT();


--safe_config_n is safe_config_n at Pin_96
--operation mode is input

safe_config_n = INPUT();


--D[1] is D[1] at Pin_72
--operation mode is input

D[1] = INPUT();


--D[2] is D[2] at Pin_75
--operation mode is input

D[2] = INPUT();


--D[3] is D[3] at Pin_76
--operation mode is input

D[3] = INPUT();


--D[4] is D[4] at Pin_77
--operation mode is input

D[4] = INPUT();


--D[5] is D[5] at Pin_78
--operation mode is input

D[5] = INPUT();


--D[6] is D[6] at Pin_79
--operation mode is input

D[6] = INPUT();


--D[7] is D[7] at Pin_80
--operation mode is input

D[7] = INPUT();


--flash_A22 is flash_A22 at Pin_29
--operation mode is output

flash_A22_tri_out = TRI(~VCC~0, !A1L54);
flash_A22 = OUTPUT(flash_A22_tri_out);


--flash_A21 is flash_A21 at Pin_28
--operation mode is output

flash_A21_tri_out = TRI(~VCC~1, !A1L54);
flash_A21 = OUTPUT(flash_A21_tri_out);


--flash_A20 is flash_A20 at Pin_27
--operation mode is output

flash_A20_tri_out = TRI(try_user_config, !A1L54);
flash_A20 = OUTPUT(flash_A20_tri_out);


--A[0] is A[0] at Pin_1
--operation mode is output

A[0]_tri_out = TRI(G1_dffs[0], !A1L54);
A[0] = OUTPUT(A[0]_tri_out);