config_controller.eqn

IIR、FIR、FFT各模块程序设计例程

--G1_dffs[10] is address_counter:The_Address_Counter|lpm_counter:lpm_counter_component|dffs[10] at LC17
G1_dffs[10]_p1_out = G1_dffs[8] & G1_dffs[9] & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & !try_asmi_config & G1_dffs[0] & G1_dffs[1] & G1_dffs[2] & G1_dffs[3] & G1_dffs[4] & G1_dffs[5] & G1_dffs[6] & G1_dffs[7];
G1_dffs[10]_p3_out = G1_dffs[8] & G1_dffs[9] & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & G1_dffs[0] & G1_dffs[1] & G1_dffs[2] & G1_dffs[3] & G1_dffs[4] & G1_dffs[5] & G1_dffs[6] & G1_dffs[7] & State_Counting;
G1_dffs[10]_or_out = G1_dffs[10]_p1_out # G1_dffs[10]_p3_out;
G1_dffs[10]_reg_input = G1_dffs[10]_or_out;
G1_dffs[10] = TFFE(G1_dffs[10]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , );


--G1_dffs[11] is address_counter:The_Address_Counter|lpm_counter:lpm_counter_component|dffs[11] at LC46
G1_dffs[11]_p1_out = G1_dffs[8] & G1_dffs[9] & G1_dffs[10] & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & !try_asmi_config & G1_dffs[0] & G1_dffs[1] & G1_dffs[2] & G1_dffs[3] & G1_dffs[4] & G1_dffs[5] & G1_dffs[6] & G1_dffs[7];
G1_dffs[11]_p3_out = G1_dffs[8] & G1_dffs[9] & G1_dffs[10] & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & G1_dffs[0] & G1_dffs[1] & G1_dffs[2] & G1_dffs[3] & G1_dffs[4] & G1_dffs[5] & G1_dffs[6] & G1_dffs[7] & State_Counting;
G1_dffs[11]_or_out = G1_dffs[11]_p1_out # G1_dffs[11]_p3_out;
G1_dffs[11]_reg_input = G1_dffs[11]_or_out;
G1_dffs[11] = TFFE(G1_dffs[11]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , );


--G1_dffs[12] is address_counter:The_Address_Counter|lpm_counter:lpm_counter_component|dffs[12] at LC45
G1_dffs[12]_p1_out = G1_dffs[8] & G1_dffs[9] & G1_dffs[10] & G1_dffs[11] & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & !try_asmi_config & G1_dffs[0] & G1_dffs[1] & G1_dffs[2] & G1_dffs[3] & G1_dffs[4] & G1_dffs[5] & G1_dffs[6] & G1_dffs[7];
G1_dffs[12]_p3_out = G1_dffs[8] & G1_dffs[9] & G1_dffs[10] & G1_dffs[11] & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & G1_dffs[0] & G1_dffs[1] & G1_dffs[2] & G1_dffs[3] & G1_dffs[4] & G1_dffs[5] & G1_dffs[6] & G1_dffs[7] & State_Counting;
G1_dffs[12]_or_out = G1_dffs[12]_p1_out # G1_dffs[12]_p3_out;
G1_dffs[12]_reg_input = G1_dffs[12]_or_out;
G1_dffs[12] = TFFE(G1_dffs[12]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , );


--G1_dffs[13] is address_counter:The_Address_Counter|lpm_counter:lpm_counter_component|dffs[13] at LC43
G1_dffs[13]_p1_out = G1_dffs[8] & G1_dffs[9] & G1_dffs[10] & G1_dffs[11] & G1_dffs[12] & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & !try_asmi_config & G1_dffs[0] & G1_dffs[1] & G1_dffs[2] & G1_dffs[3] & G1_dffs[4] & G1_dffs[5] & G1_dffs[6] & G1_dffs[7];
G1_dffs[13]_p3_out = G1_dffs[8] & G1_dffs[9] & G1_dffs[10] & G1_dffs[11] & G1_dffs[12] & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & G1_dffs[0] & G1_dffs[1] & G1_dffs[2] & G1_dffs[3] & G1_dffs[4] & G1_dffs[5] & G1_dffs[6] & G1_dffs[7] & State_Counting;
G1_dffs[13]_or_out = G1_dffs[13]_p1_out # G1_dffs[13]_p3_out;
G1_dffs[13]_reg_input = G1_dffs[13]_or_out;
G1_dffs[13] = TFFE(G1_dffs[13]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , );


--G1_dffs[14] is address_counter:The_Address_Counter|lpm_counter:lpm_counter_component|dffs[14] at LC41
G1_dffs[14]_p1_out = G1_dffs[8] & G1_dffs[9] & G1_dffs[10] & G1_dffs[11] & G1_dffs[12] & G1_dffs[13] & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & !try_asmi_config & G1_dffs[0] & G1_dffs[1] & G1_dffs[2] & G1_dffs[3] & G1_dffs[4] & G1_dffs[5] & G1_dffs[6] & G1_dffs[7];
G1_dffs[14]_p3_out = G1_dffs[8] & G1_dffs[9] & G1_dffs[10] & G1_dffs[11] & G1_dffs[12] & G1_dffs[13] & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & G1_dffs[0] & G1_dffs[1] & G1_dffs[2] & G1_dffs[3] & G1_dffs[4] & G1_dffs[5] & G1_dffs[6] & G1_dffs[7] & State_Counting;
G1_dffs[14]_or_out = G1_dffs[14]_p1_out # G1_dffs[14]_p3_out;
G1_dffs[14]_reg_input = G1_dffs[14]_or_out;
G1_dffs[14] = TFFE(G1_dffs[14]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , );


--G1_dffs[15] is address_counter:The_Address_Counter|lpm_counter:lpm_counter_component|dffs[15] at LC40
G1_dffs[15]_p1_out = G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & !try_asmi_config & G1_dffs[8] & G1_dffs[9] & G1_dffs[10] & G1_dffs[11] & G1_dffs[12] & G1_dffs[13] & G1_dffs[14] & G1_dffs[0] & G1_dffs[1] & G1_dffs[2] & G1_dffs[3] & G1_dffs[4] & G1_dffs[5] & G1_dffs[6] & G1_dffs[7];
G1_dffs[15]_p3_out = G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & G1_dffs[8] & G1_dffs[9] & G1_dffs[10] & G1_dffs[11] & G1_dffs[12] & G1_dffs[13] & G1_dffs[14] & G1_dffs[0] & G1_dffs[1] & G1_dffs[2] & G1_dffs[3] & G1_dffs[4] & G1_dffs[5] & G1_dffs[6] & G1_dffs[7] & State_Counting;
G1_dffs[15]_or_out = G1_dffs[15]_p1_out # G1_dffs[15]_p3_out;
G1_dffs[15]_reg_input = G1_dffs[15]_or_out;
G1_dffs[15] = TFFE(G1_dffs[15]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , );


--G1_dffs[19] is address_counter:The_Address_Counter|lpm_counter:lpm_counter_component|dffs[19] at LC33
G1_dffs[19]_p1_out = G1_dffs[16] & G1_dffs[18] & G1_dffs[17] & G1_dffs[15] & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & !try_asmi_config & G1_dffs[8] & G1_dffs[9] & G1_dffs[10] & G1_dffs[11] & G1_dffs[12] & G1_dffs[13] & G1_dffs[14] & G1_dffs[0] & G1_dffs[1] & G1_dffs[2] & G1_dffs[3] & G1_dffs[4] & G1_dffs[5] & G1_dffs[6] & G1_dffs[7];
G1_dffs[19]_p3_out = G1_dffs[16] & G1_dffs[18] & G1_dffs[17] & G1_dffs[15] & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & G1_dffs[8] & G1_dffs[9] & G1_dffs[10] & G1_dffs[11] & G1_dffs[12] & G1_dffs[13] & G1_dffs[14] & G1_dffs[0] & G1_dffs[1] & G1_dffs[2] & G1_dffs[3] & G1_dffs[4] & G1_dffs[5] & G1_dffs[6] & G1_dffs[7] & State_Counting;
G1_dffs[19]_or_out = G1_dffs[19]_p1_out # G1_dffs[19]_p3_out;
G1_dffs[19]_reg_input = G1_dffs[19]_or_out;
G1_dffs[19] = TFFE(G1_dffs[19]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , );


--eek_an_error is eek_an_error at LC110
eek_an_error_p1_out = State_Counting & !STATUS_n;
eek_an_error_p3_out = !State_Done & counter_wrapped;
eek_an_error_or_out = eek_an_error_p1_out # eek_an_error_p3_out;
eek_an_error_reg_input = eek_an_error_or_out;
eek_an_error = DFFE(eek_an_error_reg_input, GLOBAL(cpld_CLKOSC), !Reset_Pulse, , );


--G3_dffs[3] is dclk_divider:The_Dclk_Divider|lpm_counter:lpm_counter_component|dffs[3] at LC48
G3_dffs[3]_reg_input = VCC;
G3_dffs[3]_p3_out = G3_dffs[2] & G3_dffs[1] & G3_dffs[0];
G3_dffs[3] = TFFE(G3_dffs[3]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , G3_dffs[3]_p3_out);


--G3_dffs[2] is dclk_divider:The_Dclk_Divider|lpm_counter:lpm_counter_component|dffs[2] at LC44
G3_dffs[2]_reg_input = VCC;
G3_dffs[2]_p3_out = G3_dffs[1] & G3_dffs[0];
G3_dffs[2] = TFFE(G3_dffs[2]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , G3_dffs[2]_p3_out);


--G3_dffs[1] is dclk_divider:The_Dclk_Divider|lpm_counter:lpm_counter_component|dffs[1] at LC36
G3_dffs[1]_reg_input = VCC;
G3_dffs[1] = TFFE(G3_dffs[1]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , G3_dffs[0]);


--G3_dffs[0] is dclk_divider:The_Dclk_Divider|lpm_counter:lpm_counter_component|dffs[0] at LC113
G3_dffs[0]_reg_input = VCC;
G3_dffs[0] = TFFE(G3_dffs[0]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , );


--d1_reset_source is d1_reset_source at LC77
d1_reset_source_p1_out = d1_safe_config & !d2_safe_config;
d1_reset_source_or_out = d1_reset_source_p1_out # sync_config_request;
d1_reset_source_reg_input = d1_reset_source_or_out;
d1_reset_source_p3_out = G4_dffs[21] & G4_dffs[20] & G4_dffs[19] & G4_dffs[18] & G4_dffs[17] & G4_dffs[16] & G4_dffs[15] & G4_dffs[14] & G4_dffs[13] & G4_dffs[12] & G4_dffs[11] & G4_dffs[10] & G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
d1_reset_source = DFFE(d1_reset_source_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , d1_reset_source_p3_out);


--d2_reset_source is d2_reset_source at LC65
d2_reset_source_or_out = d1_reset_source;
d2_reset_source_reg_input = d2_reset_source_or_out;
d2_reset_source_p3_out = G4_dffs[21] & G4_dffs[20] & G4_dffs[19] & G4_dffs[18] & G4_dffs[17] & G4_dffs[16] & G4_dffs[15] & G4_dffs[14] & G4_dffs[13] & G4_dffs[12] & G4_dffs[11] & G4_dffs[10] & G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
d2_reset_source = DFFE(d2_reset_source_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , d2_reset_source_p3_out);


--counter_wrapped is counter_wrapped at LC34
counter_wrapped_or_out = VCC;
counter_wrapped_reg_input = counter_wrapped_or_out;
counter_wrapped_p3_out = G1_dffs[16] & G1_dffs[18] & G1_dffs[17] & G1_dffs[15] & G1_dffs[19] & G1_dffs[8] & G1_dffs[9] & G1_dffs[10] & G1_dffs[11] & G1_dffs[12] & G1_dffs[13] & G1_dffs[14] & G1_dffs[0] & G1_dffs[1] & G1_dffs[2] & G1_dffs[3] & G1_dffs[4] & G1_dffs[5] & G1_dffs[6] & G1_dffs[7];
counter_wrapped = DFFE(counter_wrapped_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , counter_wrapped_p3_out);


--sync_config_request is sync_config_request at LC126
sync_config_request_or_out = !config_request_n;
sync_config_request_reg_input = sync_config_request_or_out;
sync_config_request = DFFE(sync_config_request_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , );


--d1_safe_config is d1_safe_config at LC80
d1_safe_config_or_out = !safe_config_n;
d1_safe_config_reg_input = d1_safe_config_or_out;
d1_safe_config_p3_out = G4_dffs[21] & G4_dffs[20] & G4_dffs[19] & G4_dffs[18] & G4_dffs[17] & G4_dffs[16] & G4_dffs[15] & G4_dffs[14] & G4_dffs[13] & G4_dffs[12] & G4_dffs[11] & G4_dffs[10] & G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
d1_safe_config = DFFE(d1_safe_config_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , d1_safe_config_p3_out);


--d2_safe_config is d2_safe_config at LC78
d2_safe_config_or_out = d1_safe_config;
d2_safe_config_reg_input = d2_safe_config_or_out;
d2_safe_config_p3_out = G4_dffs[21] & G4_dffs[20] & G4_dffs[19] & G4_dffs[18] & G4_dffs[17] & G4_dffs[16] & G4_dffs[15] & G4_dffs[14] & G4_dffs[13] & G4_dffs[12] & G4_dffs[11] & G4_dffs[10] & G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
d2_safe_config = DFFE(d2_safe_config_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , d2_safe_config_p3_out);


--G2_dffs[2] is data_bit_counter:The_Data_Bit_Counter|lpm_counter:lpm_counter_component|dffs[2] at LC42
G2_dffs[2]_p1_out = G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[1] & G2_dffs[0] & !try_asmi_config;
G2_dffs[2]_p3_out = G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[1] & G2_dffs[0] & State_Counting;
G2_dffs[2]_or_out = G2_dffs[2]_p1_out # G2_dffs[2]_p3_out;
G2_dffs[2]_reg_input = G2_dffs[2]_or_out;
G2_dffs[2] = TFFE(G2_dffs[2]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , );


--G2_dffs[1] is data_bit_counter:The_Data_Bit_Counter|lpm_counter:lpm_counter_component|dffs[1] at LC47
G2_dffs[1]_p1_out = G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[0] & !try_asmi_config;
G2_dffs[1]_p3_out = G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & G2_dffs[0] & State_Counting;
G2_dffs[1]_or_out = G2_dffs[1]_p1_out # G2_dffs[1]_p3_out;
G2_dffs[1]_reg_input = G2_dffs[1]_or_out;
G2_dffs[1] = TFFE(G2_dffs[1]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , );


--G2_dffs[0] is data_bit_counter:The_Data_Bit_Counter|lpm_counter:lpm_counter_component|dffs[0] at LC39
G2_dffs[0]_p1_out = G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & !try_asmi_config;
G2_dffs[0]_p3_out = G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0] & State_Counting;
G2_dffs[0]_or_out = G2_dffs[0]_p1_out # G2_dffs[0]_p3_out;
G2_dffs[0]_reg_input = G2_dffs[0]_or_out;
G2_dffs[0] = TFFE(G2_dffs[0]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , );


--State_Waiting_For_STATUS_n is State_Waiting_For_STATUS_n at LC112
State_Waiting_For_STATUS_n_or_out = !STATUS_n;
State_Waiting_For_STATUS_n_reg_input = State_Waiting_For_STATUS_n_or_out;
State_Waiting_For_STATUS_n_p3_out = G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0];
State_Waiting_For_STATUS_n = DFFE(State_Waiting_For_STATUS_n_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , State_Waiting_For_STATUS_n_p3_out);


--H1_dffs[0] is shift_register:The_Shift_Register|lpm_shiftreg:lpm_shiftreg_component|dffs[0] at LC111
H1_dffs[0]_p0_out = G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & !D[1] & H1_dffs[1];
H1_dffs[0]_p4_out = G2_dffs[2] & G2_dffs[1] & G2_dffs[0] & D[1] & !H1_dffs[1];
H1_dffs[0]_or_out = H1_dffs[0]_p0_out # H1_dffs[0]_p4_out;
H1_dffs[0]_reg_input = H1_dffs[1] $ H1_dffs[0]_or_out;
H1_dffs[0]_p3_out = State_Counting & G3_dffs[3] & G3_dffs[2] & G3_dffs[1] & G3_dffs[0];
H1_dffs[0] = DFFE(H1_dffs[0]_reg_input, GLOBAL(cpld_CLKOSC), !A1L27, , H1_dffs[0]_p3_out);


--G4_dffs[21] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[21] at LC74
G4_dffs[21]_reg_input = VCC;
G4_dffs[21]_p3_out = G4_dffs[20] & G4_dffs[19] & G4_dffs[18] & G4_dffs[17] & G4_dffs[16] & G4_dffs[15] & G4_dffs[14] & G4_dffs[13] & G4_dffs[12] & G4_dffs[11] & G4_dffs[10] & G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[21] = TFFE(G4_dffs[21]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[21]_p3_out);


--G4_dffs[20] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[20] at LC79
G4_dffs[20]_reg_input = VCC;
G4_dffs[20]_p3_out = G4_dffs[19] & G4_dffs[18] & G4_dffs[17] & G4_dffs[16] & G4_dffs[15] & G4_dffs[14] & G4_dffs[13] & G4_dffs[12] & G4_dffs[11] & G4_dffs[10] & G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[20] = TFFE(G4_dffs[20]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[20]_p3_out);


--G4_dffs[19] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[19] at LC76
G4_dffs[19]_reg_input = VCC;
G4_dffs[19]_p3_out = G4_dffs[18] & G4_dffs[17] & G4_dffs[16] & G4_dffs[15] & G4_dffs[14] & G4_dffs[13] & G4_dffs[12] & G4_dffs[11] & G4_dffs[10] & G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[19] = TFFE(G4_dffs[19]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[19]_p3_out);


--G4_dffs[18] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[18] at LC75
G4_dffs[18]_reg_input = VCC;
G4_dffs[18]_p3_out = G4_dffs[17] & G4_dffs[16] & G4_dffs[15] & G4_dffs[14] & G4_dffs[13] & G4_dffs[12] & G4_dffs[11] & G4_dffs[10] & G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[18] = TFFE(G4_dffs[18]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[18]_p3_out);


--G4_dffs[17] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[17] at LC73
G4_dffs[17]_reg_input = VCC;
G4_dffs[17]_p3_out = G4_dffs[16] & G4_dffs[15] & G4_dffs[14] & G4_dffs[13] & G4_dffs[12] & G4_dffs[11] & G4_dffs[10] & G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[17] = TFFE(G4_dffs[17]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[17]_p3_out);


--G4_dffs[16] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[16] at LC72
G4_dffs[16]_reg_input = VCC;
G4_dffs[16]_p3_out = G4_dffs[15] & G4_dffs[14] & G4_dffs[13] & G4_dffs[12] & G4_dffs[11] & G4_dffs[10] & G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[16] = TFFE(G4_dffs[16]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[16]_p3_out);


--G4_dffs[15] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[15] at LC71
G4_dffs[15]_reg_input = VCC;
G4_dffs[15]_p3_out = G4_dffs[14] & G4_dffs[13] & G4_dffs[12] & G4_dffs[11] & G4_dffs[10] & G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[15] = TFFE(G4_dffs[15]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[15]_p3_out);


--G4_dffs[14] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[14] at LC70
G4_dffs[14]_reg_input = VCC;
G4_dffs[14]_p3_out = G4_dffs[13] & G4_dffs[12] & G4_dffs[11] & G4_dffs[10] & G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[14] = TFFE(G4_dffs[14]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[14]_p3_out);


--G4_dffs[13] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[13] at LC68
G4_dffs[13]_reg_input = VCC;
G4_dffs[13]_p3_out = G4_dffs[12] & G4_dffs[11] & G4_dffs[10] & G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[13] = TFFE(G4_dffs[13]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[13]_p3_out);


--G4_dffs[12] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[12] at LC67
G4_dffs[12]_reg_input = VCC;
G4_dffs[12]_p3_out = G4_dffs[11] & G4_dffs[10] & G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[12] = TFFE(G4_dffs[12]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[12]_p3_out);


--G4_dffs[11] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[11] at LC128
G4_dffs[11]_reg_input = VCC;
G4_dffs[11]_p3_out = G4_dffs[10] & G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[11] = TFFE(G4_dffs[11]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[11]_p3_out);


--G4_dffs[10] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[10] at LC124
G4_dffs[10]_reg_input = VCC;
G4_dffs[10]_p3_out = G4_dffs[9] & G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[10] = TFFE(G4_dffs[10]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[10]_p3_out);


--G4_dffs[9] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[9] at LC123
G4_dffs[9]_reg_input = VCC;
G4_dffs[9]_p3_out = G4_dffs[8] & G4_dffs[7] & G4_dffs[6] & G4_dffs[5] & G4_dffs[4] & G4_dffs[3] & G4_dffs[2] & G4_dffs[1] & G4_dffs[0];
G4_dffs[9] = TFFE(G4_dffs[9]_reg_input, GLOBAL(cpld_CLKOSC), GLOBAL(RESET_n), , G4_dffs[9]_p3_out);


--G4_dffs[8] is reset_counter:The_Reset_Counter|lpm_counter:lpm_counter_component|dffs[8] at LC127