config_controller.fit.eqn

IIR、FIR、FFT各模块程序设计例程

J1_dffs[17] = TFFE(J1_dffs[17]_reg_input, GLOBAL(cpld_CLKOSC), !A1L17, , );


--J1_dffs[18] is address_counter:The_Address_Counter|lpm_counter:lpm_counter_component|dffs[18] at LC35
J1_dffs[18]_p1_out = J1_dffs[16] & J1_dffs[17] & J1_dffs[15] & J5_dffs[3] & J5_dffs[2] & J5_dffs[1] & J5_dffs[0] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & !try_asmi_config & J1_dffs[8] & J1_dffs[9] & J1_dffs[10] & J1_dffs[11] & J1_dffs[12] & J1_dffs[13] & J1_dffs[14] & J1_dffs[0] & J1_dffs[1] & J1_dffs[2] & J1_dffs[3] & J1_dffs[4] & J1_dffs[5] & J1_dffs[6] & J1_dffs[7];
J1_dffs[18]_p3_out = J1_dffs[16] & J1_dffs[17] & J1_dffs[15] & J5_dffs[3] & J5_dffs[2] & J5_dffs[1] & J5_dffs[0] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & J1_dffs[8] & J1_dffs[9] & J1_dffs[10] & J1_dffs[11] & J1_dffs[12] & J1_dffs[13] & J1_dffs[14] & J1_dffs[0] & J1_dffs[1] & J1_dffs[2] & J1_dffs[3] & J1_dffs[4] & J1_dffs[5] & J1_dffs[6] & J1_dffs[7] & State_Counting;
J1_dffs[18]_or_out = J1_dffs[18]_p1_out # J1_dffs[18]_p3_out;
J1_dffs[18]_reg_input = J1_dffs[18]_or_out;
J1_dffs[18] = TFFE(J1_dffs[18]_reg_input, GLOBAL(cpld_CLKOSC), !A1L17, , );


--J1_dffs[19] is address_counter:The_Address_Counter|lpm_counter:lpm_counter_component|dffs[19] at LC33
J1_dffs[19]_p1_out = J1_dffs[16] & J1_dffs[18] & J1_dffs[17] & J1_dffs[15] & J5_dffs[3] & J5_dffs[2] & J5_dffs[1] & J5_dffs[0] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & !try_asmi_config & J1_dffs[8] & J1_dffs[9] & J1_dffs[10] & J1_dffs[11] & J1_dffs[12] & J1_dffs[13] & J1_dffs[14] & J1_dffs[0] & J1_dffs[1] & J1_dffs[2] & J1_dffs[3] & J1_dffs[4] & J1_dffs[5] & J1_dffs[6] & J1_dffs[7];
J1_dffs[19]_p3_out = J1_dffs[16] & J1_dffs[18] & J1_dffs[17] & J1_dffs[15] & J5_dffs[3] & J5_dffs[2] & J5_dffs[1] & J5_dffs[0] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & J1_dffs[8] & J1_dffs[9] & J1_dffs[10] & J1_dffs[11] & J1_dffs[12] & J1_dffs[13] & J1_dffs[14] & J1_dffs[0] & J1_dffs[1] & J1_dffs[2] & J1_dffs[3] & J1_dffs[4] & J1_dffs[5] & J1_dffs[6] & J1_dffs[7] & State_Counting;
J1_dffs[19]_or_out = J1_dffs[19]_p1_out # J1_dffs[19]_p3_out;
J1_dffs[19]_reg_input = J1_dffs[19]_or_out;
J1_dffs[19] = TFFE(J1_dffs[19]_reg_input, GLOBAL(cpld_CLKOSC), !A1L17, , );


--counter_wrapped is counter_wrapped at LC34
counter_wrapped_or_out = VCC;
counter_wrapped_reg_input = counter_wrapped_or_out;
counter_wrapped_p3_out = J1_dffs[16] & J1_dffs[18] & J1_dffs[17] & J1_dffs[15] & J1_dffs[19] & J1_dffs[8] & J1_dffs[9] & J1_dffs[10] & J1_dffs[11] & J1_dffs[12] & J1_dffs[13] & J1_dffs[14] & J1_dffs[0] & J1_dffs[1] & J1_dffs[2] & J1_dffs[3] & J1_dffs[4] & J1_dffs[5] & J1_dffs[6] & J1_dffs[7];
counter_wrapped = DFFE(counter_wrapped_reg_input, GLOBAL(cpld_CLKOSC), !A1L17, , counter_wrapped_p3_out);


--eek_an_error is eek_an_error at LC103
eek_an_error_p1_out = !State_Done & counter_wrapped;
eek_an_error_p3_out = State_Counting & !STATUS_n;
eek_an_error_or_out = eek_an_error_p1_out # eek_an_error_p3_out;
eek_an_error_reg_input = eek_an_error_or_out;
eek_an_error = DFFE(eek_an_error_reg_input, GLOBAL(cpld_CLKOSC), !Reset_Pulse, , );


--State_Done is State_Done at LC109
State_Done_or_out = VCC;
State_Done_reg_input = State_Done_or_out;
State_Done_p3_out = CONFIG_DONE & J5_dffs[3] & J5_dffs[2] & J5_dffs[1] & J5_dffs[0];
State_Done = DFFE(State_Done_reg_input, GLOBAL(cpld_CLKOSC), !A1L17, , State_Done_p3_out);


--K1_dffs[6] is shift_register:The_Shift_Register|lpm_shiftreg:lpm_shiftreg_component|dffs[6] at LC16
K1_dffs[6]_p1_out = J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & !D[7];
K1_dffs[6]_or_out = K1_dffs[6]_p1_out;
K1_dffs[6]_reg_input = !(K1_dffs[6]_or_out);
K1_dffs[6]_p3_out = State_Counting & J5_dffs[3] & J5_dffs[2] & J5_dffs[1] & J5_dffs[0];
K1_dffs[6] = DFFE(K1_dffs[6]_reg_input, GLOBAL(cpld_CLKOSC), !A1L17, , K1_dffs[6]_p3_out);


--A1L54 is drive_outputs~10 at LC56
A1L54_p1_out = !State_Done & !State_Error & try_asmi_config;
A1L54_or_out = A1L54_p1_out;
A1L54 = !(A1L54_or_out);


--A1L06 is loading_led~3 at LC105
A1L06_p1_out = !try_asmi_config & !CONFIG_DONE;
A1L06_p2_out = !State_Done & !State_Error & State_Counting & J1_dffs[16];
A1L06_or_out = A1L06_p1_out # A1L06_p2_out # Reset_Pulse;
A1L06 = A1L06_or_out;


--A1L64 is drive_outputs~12 at LC59
A1L64_or_out = A1L54;
A1L64 = A1L64_or_out;


--K1_dffs[5] is shift_register:The_Shift_Register|lpm_shiftreg:lpm_shiftreg_component|dffs[5] at LC111
K1_dffs[5]_p0_out = !D[6] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & K1_dffs[6];
K1_dffs[5]_p4_out = D[6] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & !K1_dffs[6];
K1_dffs[5]_or_out = K1_dffs[5]_p0_out # K1_dffs[5]_p4_out;
K1_dffs[5]_reg_input = K1_dffs[6] $ K1_dffs[5]_or_out;
K1_dffs[5]_p3_out = State_Counting & J5_dffs[3] & J5_dffs[2] & J5_dffs[1] & J5_dffs[0];
K1_dffs[5] = DFFE(K1_dffs[5]_reg_input, GLOBAL(cpld_CLKOSC), !A1L17, , K1_dffs[5]_p3_out);


--State_JTAG_Config is State_JTAG_Config at LC108
State_JTAG_Config_p1_out = State_Error & J5_dffs[3] & J5_dffs[2] & J5_dffs[1] & J5_dffs[0] & CONFIG_DONE & !State_JTAG_Config;
State_JTAG_Config_p3_out = J5_dffs[3] & J5_dffs[2] & J5_dffs[1] & J5_dffs[0] & !CONFIG_DONE & !State_JTAG_Config & State_Done;
State_JTAG_Config_or_out = State_JTAG_Config_p1_out # State_JTAG_Config_p3_out;
State_JTAG_Config_reg_input = State_JTAG_Config_or_out;
State_JTAG_Config = TFFE(State_JTAG_Config_reg_input, GLOBAL(cpld_CLKOSC), !Reset_Pulse, , );


--A1L47 is safe_led~9 at LC104
A1L47_p1_out = !State_Error & !State_JTAG_Config & try_asmi_config & try_user_config;
A1L47_or_out = A1L47_p1_out;
A1L47 = A1L47_or_out;


--K1_dffs[4] is shift_register:The_Shift_Register|lpm_shiftreg:lpm_shiftreg_component|dffs[4] at LC100
K1_dffs[4]_p0_out = !D[5] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & K1_dffs[5];
K1_dffs[4]_p4_out = D[5] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & !K1_dffs[5];
K1_dffs[4]_or_out = K1_dffs[4]_p0_out # K1_dffs[4]_p4_out;
K1_dffs[4]_reg_input = K1_dffs[5] $ K1_dffs[4]_or_out;
K1_dffs[4]_p3_out = State_Counting & J5_dffs[3] & J5_dffs[2] & J5_dffs[1] & J5_dffs[0];
K1_dffs[4] = DFFE(K1_dffs[4]_reg_input, GLOBAL(cpld_CLKOSC), !A1L17, , K1_dffs[4]_p3_out);


--A1L36 is pld_MSEL0~19 at LC99
A1L36_p1_out = !State_Done & !State_Error & !State_JTAG_Config & try_asmi_config;
A1L36_p2_out = !State_Done & !State_Error & !State_JTAG_Config & cause_was_safe_config;
A1L36_or_out = A1L36_p1_out # A1L36_p2_out;
A1L36 = A1L36_or_out;


--A1L98 is user_led~124 at LC102
A1L98_p1_out = !State_Error & !try_user_config & !State_JTAG_Config & try_asmi_config;
A1L98_p2_out = !State_JTAG_Config & !try_asmi_config & J1_dffs[16] & CONFIG_DONE;
A1L98_p3_out = !State_JTAG_Config & !try_asmi_config & CONFIG_DONE & J1_dffs[18];
A1L98_p4_out = !State_JTAG_Config & !try_asmi_config & CONFIG_DONE & J1_dffs[17];
A1L98_or_out = A1L98_p1_out # A1L98_p2_out # A1L98_p3_out # A1L98_p4_out;
A1L98 = A1L98_or_out;


--A1L15 is error_led~3 at LC107
A1L15_p1_out = State_Error & !State_JTAG_Config;
A1L15_p2_out = !try_asmi_config & !STATUS_n;
A1L15_or_out = A1L15_p1_out # A1L15_p2_out;
A1L15 = A1L15_or_out;


--K1_dffs[3] is shift_register:The_Shift_Register|lpm_shiftreg:lpm_shiftreg_component|dffs[3] at LC98
K1_dffs[3]_p0_out = !D[4] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & K1_dffs[4];
K1_dffs[3]_p4_out = D[4] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & !K1_dffs[4];
K1_dffs[3]_or_out = K1_dffs[3]_p0_out # K1_dffs[3]_p4_out;
K1_dffs[3]_reg_input = K1_dffs[4] $ K1_dffs[3]_or_out;
K1_dffs[3]_p3_out = State_Counting & J5_dffs[3] & J5_dffs[2] & J5_dffs[1] & J5_dffs[0];
K1_dffs[3] = DFFE(K1_dffs[3]_reg_input, GLOBAL(cpld_CLKOSC), !A1L17, , K1_dffs[3]_p3_out);


--K1_dffs[2] is shift_register:The_Shift_Register|lpm_shiftreg:lpm_shiftreg_component|dffs[2] at LC12
K1_dffs[2]_p0_out = !D[3] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & K1_dffs[3];
K1_dffs[2]_p4_out = D[3] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & !K1_dffs[3];
K1_dffs[2]_or_out = K1_dffs[2]_p0_out # K1_dffs[2]_p4_out;
K1_dffs[2]_reg_input = K1_dffs[3] $ K1_dffs[2]_or_out;
K1_dffs[2]_p3_out = State_Counting & J5_dffs[3] & J5_dffs[2] & J5_dffs[1] & J5_dffs[0];
K1_dffs[2] = DFFE(K1_dffs[2]_reg_input, GLOBAL(cpld_CLKOSC), !A1L17, , K1_dffs[2]_p3_out);


--K1_dffs[1] is shift_register:The_Shift_Register|lpm_shiftreg:lpm_shiftreg_component|dffs[1] at LC13
K1_dffs[1]_p0_out = !D[2] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & K1_dffs[2];
K1_dffs[1]_p4_out = D[2] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & !K1_dffs[2];
K1_dffs[1]_or_out = K1_dffs[1]_p0_out # K1_dffs[1]_p4_out;
K1_dffs[1]_reg_input = K1_dffs[2] $ K1_dffs[1]_or_out;
K1_dffs[1]_p3_out = State_Counting & J5_dffs[3] & J5_dffs[2] & J5_dffs[1] & J5_dffs[0];
K1_dffs[1] = DFFE(K1_dffs[1]_reg_input, GLOBAL(cpld_CLKOSC), !A1L17, , K1_dffs[1]_p3_out);


--K1_dffs[0] is shift_register:The_Shift_Register|lpm_shiftreg:lpm_shiftreg_component|dffs[0] at LC11
K1_dffs[0]_p0_out = !D[1] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & K1_dffs[1];
K1_dffs[0]_p4_out = D[1] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0] & !K1_dffs[1];
K1_dffs[0]_or_out = K1_dffs[0]_p0_out # K1_dffs[0]_p4_out;
K1_dffs[0]_reg_input = K1_dffs[1] $ K1_dffs[0]_or_out;
K1_dffs[0]_p3_out = State_Counting & J5_dffs[3] & J5_dffs[2] & J5_dffs[1] & J5_dffs[0];
K1_dffs[0] = DFFE(K1_dffs[0]_reg_input, GLOBAL(cpld_CLKOSC), !A1L17, , K1_dffs[0]_p3_out);


--A1L24 is DATA0~49 at LC97
A1L24_p1_out = D[0] & J4_dffs[2] & J4_dffs[1] & J4_dffs[0];
A1L24_p2_out = !J4_dffs[2] & K1_dffs[0];
A1L24_p3_out = !J4_dffs[1] & K1_dffs[0];
A1L24_p4_out = !J4_dffs[0] & K1_dffs[0];
A1L24_or_out = A1L24_p1_out # A1L24_p2_out # A1L24_p3_out # A1L24_p4_out;
A1L24 = A1L24_or_out;


--~GND~0 is ~GND~0 at LC101
~GND~0_or_out = GND;
~GND~0 = ~GND~0_or_out;


--~VCC~0 is ~VCC~0 at LC69
~VCC~0_or_out = GND;
~VCC~0 = !(~VCC~0_or_out);


--~VCC~1 is ~VCC~1 at LC61
~VCC~1_or_out = GND;
~VCC~1 = !(~VCC~1_or_out);


--~VCC~2 is ~VCC~2 at LC62
~VCC~2_or_out = GND;
~VCC~2 = !(~VCC~2_or_out);


--~VCC~3 is ~VCC~3 at LC57
~VCC~3_or_out = GND;
~VCC~3 = !(~VCC~3_or_out);


--A1L17 is restart_sequence~53bal at LC52
A1L17_p1_out = try_asmi_config & !Reset_Pulse & try_user_config;
A1L17_p2_out = !Reset_Pulse & !eek_an_error;
A1L17_or_out = A1L17_p1_out # A1L17_p2_out;
A1L17 = !(A1L17_or_out);


--cpld_CLKOSC is cpld_CLKOSC at Pin_87
--operation mode is input

cpld_CLKOSC = INPUT();


--RESET_n is RESET_n at Pin_89
--operation mode is input

RESET_n = INPUT();


--STATUS_n is STATUS_n at Pin_92
--operation mode is input

STATUS_n = INPUT();


--config_request_n is config_request_n at Pin_94
--operation mode is input

config_request_n = INPUT();


--safe_config_n is safe_config_n at Pin_96
--operation mode is input

safe_config_n = INPUT();


--D[0] is D[0] at Pin_71
--operation mode is input

D[0] = INPUT();


--D[1] is D[1] at Pin_72
--operation mode is input

D[1] = INPUT();


--D[2] is D[2] at Pin_75
--operation mode is input

D[2] = INPUT();


--D[3] is D[3] at Pin_76
--operation mode is input

D[3] = INPUT();


--D[4] is D[4] at Pin_77
--operation mode is input

D[4] = INPUT();


--D[5] is D[5] at Pin_78
--operation mode is input

D[5] = INPUT();


--D[6] is D[6] at Pin_79
--operation mode is input

D[6] = INPUT();


--D[7] is D[7] at Pin_80
--operation mode is input

D[7] = INPUT();


--CONFIG_DONE is CONFIG_DONE at Pin_85
--operation mode is input