config_controller.qsf

IIR、FIR、FFT各模块程序设计例程

# Copyright (C) 1991-2004 Altera Corporation
# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
# support information,  device programming or simulation file,  and any other
# associated  documentation or information  provided by  Altera  or a partner
# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
# other  use  of such  megafunction  design,  netlist,  support  information,
# device programming or simulation file,  or any other  related documentation
# or information  is prohibited  for  any  other purpose,  including, but not
# limited to  modification,  reverse engineering,  de-compiling, or use  with
# any other  silicon devices,  unless such use is  explicitly  licensed under
# a separate agreement with  Altera  or a megafunction partner.  Title to the
# intellectual property,  including patents,  copyrights,  trademarks,  trade
# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
# support  information,  device programming or simulation file,  or any other
# related documentation or information provided by  Altera  or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.


# The default values for assignments are stored in the file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 2.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "14:42:48  APRIL 22, 2004"
set_global_assignment -name LAST_QUARTUS_VERSION "4.0 SP1"
set_global_assignment -name AHDL_FILE data_bit_counter.tdf
set_global_assignment -name AHDL_FILE reset_counter.tdf
set_global_assignment -name AHDL_FILE shift_register.tdf
set_global_assignment -name AHDL_FILE address_counter.tdf
set_global_assignment -name AHDL_FILE config_controller.tdf
set_global_assignment -name AHDL_FILE dclk_divider.tdf
set_global_assignment -name VECTOR_WAVEFORM_FILE config_controller.vwf
set_global_assignment -name CDF_FILE rMax.cdf
set_global_assignment -name CDF_FILE Chain1.cdf

# Pin & Location Assignments
# ==========================
set_global_assignment -name RESERVE_PIN "AS INPUT TRI-STATED"
set_location_assignment PIN_1 -to A\[0\]
set_location_assignment PIN_14 -to A\[10\]
set_location_assignment PIN_16 -to A\[11\]
set_location_assignment PIN_17 -to A\[12\]
set_location_assignment PIN_19 -to A\[13\]
set_location_assignment PIN_20 -to A\[14\]
set_location_assignment PIN_21 -to A\[15\]
set_location_assignment PIN_22 -to A\[16\]
set_location_assignment PIN_23 -to A\[17\]
set_location_assignment PIN_24 -to A\[18\]
set_location_assignment PIN_25 -to A\[19\]
set_location_assignment PIN_2 -to A\[1\]
set_location_assignment PIN_5 -to A\[2\]
set_location_assignment PIN_6 -to A\[3\]
set_location_assignment PIN_7 -to A\[4\]
set_location_assignment PIN_8 -to A\[5\]
set_location_assignment PIN_9 -to A\[6\]
set_location_assignment PIN_10 -to A\[7\]
set_location_assignment PIN_12 -to A\[8\]
set_location_assignment PIN_13 -to A\[9\]
set_location_assignment PIN_85 -to CONFIG_DONE
set_location_assignment PIN_98 -to CONFIG_n
set_location_assignment PIN_97 -to DCLK
set_location_assignment PIN_71 -to D\[0\]
set_location_assignment PIN_72 -to D\[1\]
set_location_assignment PIN_75 -to D\[2\]
set_location_assignment PIN_76 -to D\[3\]
set_location_assignment PIN_77 -to D\[4\]
set_location_assignment PIN_78 -to D\[5\]
set_location_assignment PIN_79 -to D\[6\]
set_location_assignment PIN_80 -to D\[7\]
set_location_assignment PIN_99 -to INIT_DONE
set_location_assignment PIN_89 -to RESET_n
set_location_assignment PIN_92 -to STATUS_n
set_location_assignment PIN_94 -to config_request_n
set_location_assignment PIN_87 -to cpld_CLKOSC
set_location_assignment PIN_42 -to enet_VLBUS_n
set_location_assignment PIN_54 -to enet_reset
set_location_assignment PIN_70 -to error_led
set_location_assignment PIN_27 -to flash_A20
set_location_assignment PIN_28 -to flash_A21
set_location_assignment PIN_29 -to flash_A22
set_location_assignment PIN_32 -to flash_CS_n
set_location_assignment PIN_30 -to flash_OE_n
set_location_assignment PIN_31 -to flash_RW_n
set_location_assignment PIN_35 -to flash_RY_BY_n
set_location_assignment PIN_61 -to flash_reset_n
set_location_assignment PIN_69 -to loading_led
set_location_assignment PIN_58 -to pld_ASDO
set_location_assignment PIN_55 -to pld_CS_n
set_location_assignment PIN_63 -to pld_DATA0
set_location_assignment PIN_64 -to pld_MSEL0
set_location_assignment PIN_65 -to pld_MSEL1
set_location_assignment PIN_56 -to proto1_reset_n
set_location_assignment PIN_57 -to proto2_reset_n
set_location_assignment PIN_96 -to safe_config_n
set_location_assignment PIN_68 -to safe_led
set_location_assignment PIN_36 -to user_PB0
set_location_assignment PIN_37 -to user_PB1
set_location_assignment PIN_40 -to user_PB2
set_location_assignment PIN_41 -to user_PB3
set_location_assignment PIN_67 -to user_led

# Timing Assignments
# ==================
set_global_assignment -name IGNORE_CLOCK_SETTINGS ON
set_global_assignment -name CUT_OFF_PATHS_BETWEEN_CLOCK_DOMAINS OFF
set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name REMOVE_DUPLICATE_LOGIC OFF
set_global_assignment -name REMOVE_DUPLICATE_REGISTERS OFF
set_global_assignment -name FAMILY MAX7000AE
set_global_assignment -name SAVE_DISK_SPACE OFF
set_global_assignment -name TOP_LEVEL_ENTITY config_controller
set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF

# Fitter Assignments
# ==================
set_global_assignment -name OPTIMIZE_TIMING "NORMAL COMPILATION"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF
set_global_assignment -name CYCLONE_CONFIGURATION_SCHEME "PASSIVE SERIAL"
set_global_assignment -name DEVICE "EPM7128AETC100-7"
set_global_assignment -name INC_PLC_MODE OFF
set_global_assignment -name ROUTING_BACK_ANNOTATION_MODE OFF

# Timing Analysis Assignments
# ===========================
set_global_assignment -name MAX_SCC_SIZE 50
set_global_assignment -name RUN_ALL_TIMING_ANALYSES OFF
set_global_assignment -name RUN_TIMING_ANALYSES ON

# Assembler Assignments
# =====================
set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPC2
set_global_assignment -name CYCLONE_CONFIGURATION_DEVICE EPC2
set_global_assignment -name FLEX10K_CONFIGURATION_DEVICE EPC2
set_global_assignment -name FLEX6K_CONFIGURATION_DEVICE EPC1
set_global_assignment -name MERCURY_CONFIGURATION_DEVICE EPC2
set_global_assignment -name EXCALIBUR_CONFIGURATION_DEVICE EPC2
set_global_assignment -name APEX20K_CONFIGURATION_DEVICE EPC2

# Simulator Assignments
# =====================
set_global_assignment -name GLITCH_INTERVAL "1.0 ns"
set_global_assignment -name SIMULATION_COVERAGE OFF
set_global_assignment -name POWER_ESTIMATION_START_TIME "0.0 ns"
set_global_assignment -name END_TIME "100.0 us"
set_global_assignment -name VECTOR_INPUT_SOURCE config_controller.vwf

# Design Assistant Assignments
# ============================
set_global_assignment -name HCPY_ALOAD_SIGNALS OFF
set_global_assignment -name HCPY_VREF_PINS OFF
set_global_assignment -name HCPY_CAT OFF
set_global_assignment -name ACLK_RULE_IMSZER_ADOMAIN OFF
set_global_assignment -name ACLK_RULE_SZER_BTW_ACLK_DOMAIN OFF
set_global_assignment -name ACLK_RULE_NO_SZER_ACLK_DOMAIN OFF
set_global_assignment -name ACLK_CAT OFF
set_global_assignment -name SIGNALRACE_RULE_ASYNCHPIN_SYNCH_CLKPIN OFF
set_global_assignment -name SIGNALRACE_CAT OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_LATCH_UNIDENTIFIED OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_SRLATCH OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_MULTI_VIBRATOR OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_ILLEGAL_PULSE_GEN OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_RIPPLE_CLK OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_DELAY_CHAIN OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_REG_LOOP OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_COMBLOOP OFF
set_global_assignment -name NONSYNCHSTRUCT_CAT OFF
set_global_assignment -name TIMING_RULE_COIN_CLKEDGE OFF
set_global_assignment -name TIMING_RULE_SHIFT_REG OFF
set_global_assignment -name TIMING_CAT OFF
set_global_assignment -name RESET_RULE_IMSYNCH_ASYNCH_DOMAIN OFF
set_global_assignment -name RESET_RULE_UNSYNCH_ASYNCH_DOMAIN OFF
set_global_assignment -name RESET_RULE_COMB_ASYNCH_RESET OFF
set_global_assignment -name RESET_RULE_IMSYNCH_EXRESET OFF
set_global_assignment -name RESET_RULE_UNSYNCH_EXRESET OFF
set_global_assignment -name RESET_RULE_INPINS_RESETNET OFF
set_global_assignment -name RESET_CAT OFF
set_global_assignment -name CLK_RULE_MIX_EDGES OFF
set_global_assignment -name CLK_RULE_CLKNET_CLKSPINES OFF
set_global_assignment -name CLK_RULE_INPINS_CLKNET OFF
set_global_assignment -name CLK_RULE_GATING_SCHEME OFF
set_global_assignment -name CLK_RULE_INV_CLOCK OFF
set_global_assignment -name CLK_RULE_COMB_CLOCK OFF
set_global_assignment -name CLK_CAT OFF

# SignalProbe Assignments
# =======================
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[0\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[10\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[11\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[12\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[13\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[14\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[15\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[16\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[17\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[18\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[19\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[1\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[2\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[3\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[4\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[5\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[6\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[7\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[8\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to A\[9\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to CONFIG_DONE
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to CONFIG_n
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to DBCNTCOUT
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to DCLK
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to DCLKCOUT
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to DCLKQ3_STATE
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to DRIVE_OUT
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to D\[0\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to D\[1\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to D\[2\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to D\[3\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to D\[4\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to D\[5\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to D\[6\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to D\[7\]
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to INIT_DONE
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to RESET_n
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to STATE_CNTG
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to STATUS_n
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to config_request_n
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to cpld_CLKOSC
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to enet_VLBUS_n
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to enet_reset
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to error_led
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to flash_A20
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to flash_A21
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to flash_A22
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to flash_CS_n
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to flash_OE_n
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to flash_RW_n
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to flash_RY_BY_n
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to flash_reset_n
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to loading_led
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to pld_ASDO
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to pld_CS_n
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to pld_DATA0
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to pld_MSEL0
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to pld_MSEL1
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to proto1_reset_n
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to proto2_reset_n
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to safe_config_n
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to safe_led
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to user_PB0
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to user_PB1
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to user_PB2
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to user_PB3
set_instance_assignment -name SIGNALPROBE_ENABLE OFF -to user_led