dianzhen.tan.qmsg

实现一个10秒倒计时电路

{ "Info" "ITDB_TSU_RESULT" "q1\[3\]~reg0 countbutton clk 0.433 ns register " "Info: tsu for register q1\[3\]~reg0 (data pin = countbutton, clock pin = clk) is 0.433 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.144 ns + Longest pin register " "Info: + Longest pin to register delay is 7.144 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.708 ns) 0.708 ns countbutton 1 PIN PIN_50 5 " "Info: 1: + IC(0.000 ns) + CELL(0.708 ns) = 0.708 ns; Loc. = PIN_50; Fanout = 5; PIN Node = 'countbutton'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "" { countbutton } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 10 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.017 ns) + CELL(0.472 ns) 4.197 ns Mux~2754 2 COMB LC_X6_Y1_N6 4 " "Info: 2: + IC(3.017 ns) + CELL(0.472 ns) = 4.197 ns; Loc. = LC_X6_Y1_N6; Fanout = 4; COMB Node = 'Mux~2754'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "3.489 ns" { countbutton Mux~2754 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.276 ns) + CELL(0.128 ns) 5.601 ns Mux~2652 3 COMB LC_X5_Y2_N8 1 " "Info: 3: + IC(1.276 ns) + CELL(0.128 ns) = 5.601 ns; Loc. = LC_X5_Y2_N8; Fanout = 1; COMB Node = 'Mux~2652'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "1.404 ns" { Mux~2754 Mux~2652 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.166 ns) + CELL(0.377 ns) 7.144 ns q1\[3\]~reg0 4 REG LC_X5_Y1_N6 13 " "Info: 4: + IC(1.166 ns) + CELL(0.377 ns) = 7.144 ns; Loc. = LC_X5_Y1_N6; Fanout = 13; REG Node = 'q1\[3\]~reg0'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "1.543 ns" { Mux~2652 q1[3]~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 127 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.685 ns 23.59 % " "Info: Total cell delay = 1.685 ns ( 23.59 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.459 ns 76.41 % " "Info: Total interconnect delay = 5.459 ns ( 76.41 % )" {  } {  } 0}  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "7.144 ns" { countbutton Mux~2754 Mux~2652 q1[3]~reg0 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.113 ns + " "Info: + Micro setup delay of destination is 0.113 ns" {  } { { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 127 -1 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 6.824 ns - Shortest register " "Info: - Shortest clock path from clock clk to destination register is 6.824 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.727 ns) 0.727 ns clk 1 CLK PIN_14 64 " "Info: 1: + IC(0.000 ns) + CELL(0.727 ns) = 0.727 ns; Loc. = PIN_14; Fanout = 64; CLK Node = 'clk'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "" { clk } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 10 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.861 ns) + CELL(0.829 ns) 2.417 ns clk1~reg0 2 REG LC_X2_Y3_N8 30 " "Info: 2: + IC(0.861 ns) + CELL(0.829 ns) = 2.417 ns; Loc. = LC_X2_Y3_N8; Fanout = 30; REG Node = 'clk1~reg0'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "1.690 ns" { clk clk1~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 39 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.272 ns) + CELL(0.829 ns) 4.518 ns clk2~reg0 3 REG LC_X2_Y1_N4 17 " "Info: 3: + IC(1.272 ns) + CELL(0.829 ns) = 4.518 ns; Loc. = LC_X2_Y1_N4; Fanout = 17; REG Node = 'clk2~reg0'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "2.101 ns" { clk1~reg0 clk2~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 59 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.720 ns) + CELL(0.586 ns) 6.824 ns q1\[3\]~reg0 4 REG LC_X5_Y1_N6 13 " "Info: 4: + IC(1.720 ns) + CELL(0.586 ns) = 6.824 ns; Loc. = LC_X5_Y1_N6; Fanout = 13; REG Node = 'q1\[3\]~reg0'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "2.306 ns" { clk2~reg0 q1[3]~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 127 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.971 ns 43.54 % " "Info: Total cell delay = 2.971 ns ( 43.54 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.853 ns 56.46 % " "Info: Total interconnect delay = 3.853 ns ( 56.46 % )" {  } {  } 0}  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "6.824 ns" { clk clk1~reg0 clk2~reg0 q1[3]~reg0 } "NODE_NAME" } } }  } 0}  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "7.144 ns" { countbutton Mux~2754 Mux~2652 q1[3]~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "6.824 ns" { clk clk1~reg0 clk2~reg0 q1[3]~reg0 } "NODE_NAME" } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk q\[7\] q\[7\]~reg0 9.450 ns register " "Info: tco from clock clk to destination pin q\[7\] through register q\[7\]~reg0 is 9.450 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 6.824 ns + Longest register " "Info: + Longest clock path from clock clk to source register is 6.824 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.727 ns) 0.727 ns clk 1 CLK PIN_14 64 " "Info: 1: + IC(0.000 ns) + CELL(0.727 ns) = 0.727 ns; Loc. = PIN_14; Fanout = 64; CLK Node = 'clk'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "" { clk } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 10 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.861 ns) + CELL(0.829 ns) 2.417 ns clk1~reg0 2 REG LC_X2_Y3_N8 30 " "Info: 2: + IC(0.861 ns) + CELL(0.829 ns) = 2.417 ns; Loc. = LC_X2_Y3_N8; Fanout = 30; REG Node = 'clk1~reg0'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "1.690 ns" { clk clk1~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 39 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.272 ns) + CELL(0.829 ns) 4.518 ns clk2~reg0 3 REG LC_X2_Y1_N4 17 " "Info: 3: + IC(1.272 ns) + CELL(0.829 ns) = 4.518 ns; Loc. = LC_X2_Y1_N4; Fanout = 17; REG Node = 'clk2~reg0'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "2.101 ns" { clk1~reg0 clk2~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 59 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.720 ns) + CELL(0.586 ns) 6.824 ns q\[7\]~reg0 4 REG LC_X6_Y4_N3 2 " "Info: 4: + IC(1.720 ns) + CELL(0.586 ns) = 6.824 ns; Loc. = LC_X6_Y4_N3; Fanout = 2; REG Node = 'q\[7\]~reg0'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "2.306 ns" { clk2~reg0 q[7]~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 426 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.971 ns 43.54 % " "Info: Total cell delay = 2.971 ns ( 43.54 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.853 ns 56.46 % " "Info: Total interconnect delay = 3.853 ns ( 56.46 % )" {  } {  } 0}  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "6.824 ns" { clk clk1~reg0 clk2~reg0 q[7]~reg0 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.243 ns + " "Info: + Micro clock to output delay of source is 0.243 ns" {  } { { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 426 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "2.383 ns + Longest register pin " "Info: + Longest register to pin delay is 2.383 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns q\[7\]~reg0 1 REG LC_X6_Y4_N3 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X6_Y4_N3; Fanout = 2; REG Node = 'q\[7\]~reg0'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "" { q[7]~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 426 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.319 ns) + CELL(1.064 ns) 2.383 ns q\[7\] 2 PIN PIN_84 0 " "Info: 2: + IC(1.319 ns) + CELL(1.064 ns) = 2.383 ns; Loc. = PIN_84; Fanout = 0; PIN Node = 'q\[7\]'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "2.383 ns" { q[7]~reg0 q[7] } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 16 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.064 ns 44.65 % " "Info: Total cell delay = 1.064 ns ( 44.65 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.319 ns 55.35 % " "Info: Total interconnect delay = 1.319 ns ( 55.35 % )" {  } {  } 0}  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "2.383 ns" { q[7]~reg0 q[7] } "NODE_NAME" } } }  } 0}  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "6.824 ns" { clk clk1~reg0 clk2~reg0 q[7]~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "2.383 ns" { q[7]~reg0 q[7] } "NODE_NAME" } } }  } 0}
{ "Info" "ITDB_TH_RESULT" "q1\[1\]~reg0 countbutton clk 2.562 ns register " "Info: th for register q1\[1\]~reg0 (data pin = countbutton, clock pin = clk) is 2.562 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 6.824 ns + Longest register " "Info: + Longest clock path from clock clk to destination register is 6.824 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.727 ns) 0.727 ns clk 1 CLK PIN_14 64 " "Info: 1: + IC(0.000 ns) + CELL(0.727 ns) = 0.727 ns; Loc. = PIN_14; Fanout = 64; CLK Node = 'clk'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "" { clk } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 10 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.861 ns) + CELL(0.829 ns) 2.417 ns clk1~reg0 2 REG LC_X2_Y3_N8 30 " "Info: 2: + IC(0.861 ns) + CELL(0.829 ns) = 2.417 ns; Loc. = LC_X2_Y3_N8; Fanout = 30; REG Node = 'clk1~reg0'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "1.690 ns" { clk clk1~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 39 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.272 ns) + CELL(0.829 ns) 4.518 ns clk2~reg0 3 REG LC_X2_Y1_N4 17 " "Info: 3: + IC(1.272 ns) + CELL(0.829 ns) = 4.518 ns; Loc. = LC_X2_Y1_N4; Fanout = 17; REG Node = 'clk2~reg0'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "2.101 ns" { clk1~reg0 clk2~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 59 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.720 ns) + CELL(0.586 ns) 6.824 ns q1\[1\]~reg0 4 REG LC_X6_Y1_N7 18 " "Info: 4: + IC(1.720 ns) + CELL(0.586 ns) = 6.824 ns; Loc. = LC_X6_Y1_N7; Fanout = 18; REG Node = 'q1\[1\]~reg0'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "2.306 ns" { clk2~reg0 q1[1]~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 127 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.971 ns 43.54 % " "Info: Total cell delay = 2.971 ns ( 43.54 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.853 ns 56.46 % " "Info: Total interconnect delay = 3.853 ns ( 56.46 % )" {  } {  } 0}  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "6.824 ns" { clk clk1~reg0 clk2~reg0 q1[1]~reg0 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TH_DELAY" "0.141 ns + " "Info: + Micro hold delay of destination is 0.141 ns" {  } { { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 127 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.403 ns - Shortest pin register " "Info: - Shortest pin to register delay is 4.403 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.708 ns) 0.708 ns countbutton 1 PIN PIN_50 5 " "Info: 1: + IC(0.000 ns) + CELL(0.708 ns) = 0.708 ns; Loc. = PIN_50; Fanout = 5; PIN Node = 'countbutton'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "" { countbutton } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 10 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.018 ns) + CELL(0.677 ns) 4.403 ns q1\[1\]~reg0 2 REG LC_X6_Y1_N7 18 " "Info: 2: + IC(3.018 ns) + CELL(0.677 ns) = 4.403 ns; Loc. = LC_X6_Y1_N7; Fanout = 18; REG Node = 'q1\[1\]~reg0'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "3.695 ns" { countbutton q1[1]~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 127 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.385 ns 31.46 % " "Info: Total cell delay = 1.385 ns ( 31.46 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.018 ns 68.54 % " "Info: Total interconnect delay = 3.018 ns ( 68.54 % )" {  } {  } 0}  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "4.403 ns" { countbutton q1[1]~reg0 } "NODE_NAME" } } }  } 0}  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "6.824 ns" { clk clk1~reg0 clk2~reg0 q1[1]~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "4.403 ns" { countbutton q1[1]~reg0 } "NODE_NAME" } } }  } 0}
{ "Info" "ITDB_FULL_MIN_TCO_RESULT" "clk clk1 clk1~reg0 4.448 ns register " "Info: Minimum tco from clock clk to destination pin clk1 through register clk1~reg0 is 4.448 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.174 ns + Shortest register " "Info: + Shortest clock path from clock clk to source register is 2.174 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.727 ns) 0.727 ns clk 1 CLK PIN_14 64 " "Info: 1: + IC(0.000 ns) + CELL(0.727 ns) = 0.727 ns; Loc. = PIN_14; Fanout = 64; CLK Node = 'clk'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "" { clk } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 10 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.861 ns) + CELL(0.586 ns) 2.174 ns clk1~reg0 2 REG LC_X2_Y3_N8 30 " "Info: 2: + IC(0.861 ns) + CELL(0.586 ns) = 2.174 ns; Loc. = LC_X2_Y3_N8; Fanout = 30; REG Node = 'clk1~reg0'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "1.447 ns" { clk clk1~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 39 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.313 ns 60.40 % " "Info: Total cell delay = 1.313 ns ( 60.40 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.861 ns 39.60 % " "Info: Total interconnect delay = 0.861 ns ( 39.60 % )" {  } {  } 0}  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "2.174 ns" { clk clk1~reg0 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.243 ns + " "Info: + Micro clock to output delay of source is 0.243 ns" {  } { { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 39 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "2.031 ns + Shortest register pin " "Info: + Shortest register to pin delay is 2.031 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns clk1~reg0 1 REG LC_X2_Y3_N8 30 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X2_Y3_N8; Fanout = 30; REG Node = 'clk1~reg0'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "" { clk1~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 39 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.967 ns) + CELL(1.064 ns) 2.031 ns clk1 2 PIN PIN_8 0 " "Info: 2: + IC(0.967 ns) + CELL(1.064 ns) = 2.031 ns; Loc. = PIN_8; Fanout = 0; PIN Node = 'clk1'" {  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "2.031 ns" { clk1~reg0 clk1 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/dianzhen.vhd" "" "" { Text "E:/yaning8/ya3/db/dianzhen.vhd" 11 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.064 ns 52.39 % " "Info: Total cell delay = 1.064 ns ( 52.39 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.967 ns 47.61 % " "Info: Total interconnect delay = 0.967 ns ( 47.61 % )" {  } {  } 0}  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "2.031 ns" { clk1~reg0 clk1 } "NODE_NAME" } } }  } 0}  } { { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "2.174 ns" { clk clk1~reg0 } "NODE_NAME" } } } { "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" "" "" { Report "E:/yaning8/ya3/db/db/dianzhen_cmp.qrpt" Compiler "dianzhen" "UNKNOWN" "V1" "E:/yaning8/ya3/db/db/dianzhen.quartus_db" { Floorplan "" "" "2.031 ns" { clk1~reg0 clk1 } "NODE_NAME" } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 4 s " "Info: Quartus II Timing Analyzer was successful. 0 errors, 4 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Fri Dec 26 11:28:31 2008 " "Info: Processing ended: Fri Dec 26 11:28:31 2008" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0}  } {  } 0}