command.vhd

line CCD sensor controller for ID card scanner

-------------------------------------------------
--	Ad9822		Top
--   Config		"C"   0x00
--  	Mux			"M"	 0x01
--	Rpga			"R"	 0x02
--	Gpga			"G"	 0x03
--	Bpga			"B"   0x04
-- 	Roffset		"F"	 0x05
--	Goffset		"K"	 0x06
--	Boffset		"T"	 0x07
	
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;


entity command is
	port(
		clock		: in std_logic;
		reset	: in std_logic;
		---  serial data in
		rx_command	: in std_logic_vector(7 downto 0);
		s_clk	: in std_logic;
		-------------------------
		-----  test led 
--		buzz_led  : out std_logic;
--		end_led	: out std_logic;
--		working_led : out std_logic;
--		ready_led	: out std_logic;
--		memory_led: out std_logic;
		--------------------------
		---- Data rom control
--		rom_cs	: out std_logic;
--		rom_rw	: out std_logic;
--		address	: out std_logic_vector(7 downto 0);
--		write_data: out std_logic_vector(7 downto 0);
--		read_data	: in std_logic_vector(7 downto 0);
--		rom_ready	: in std_logic;
		---------------------------
		--- ad9822 control
--		ad_cs	: out std_logic;
--		ad_rw	: out std_logic;
		r_clk : in std_logic;
		g_clk : in std_logic;
		b_clk : in std_logic;
   		adc_reset   : out std_logic;
--		test_out    : out std_logic;
		top_img : in std_logic_vector(7 downto 0);
		bot_img : in std_logic_vector(7 downto 0);
--		config	: out std_logic_vector(7 downto 0);
--		mux		: out std_logic_vector(7 downto 0);
--		rpga	: out std_logic_vector(7 downto 0);
--		gpga	: out std_logic_vector(7 downto 0);
--		bpga	: out std_logic_vector(7 downto 0);
--		roff	: out std_logic_vector(7 downto 0);
--		goff	: out std_logic_vector(7 downto 0);
--		boff	: out std_logic_vector(7 downto 0);
		---------------------------------
		tx_data	: out std_logic_vector(7 downto 0);
		tx_req	: out std_logic;
		tx_ok	: in std_logic
--		mot_on	: out std_logic;
--		dir		: out std_logic
		);
end command;
architecture Behavioral of command is
	type master_state is (	idle,
						cmd_rcv1,
						cmd_run,
						iscan,
						write,
						read,
						sdata_tx,
						data_tx,
						wait_n
	                   	 );
	signal current_cycle,next_cycle : master_state;
	signal s_clk_buf	: std_logic;
	signal cmd1_buf	: std_logic_vector(7 downto 0);
	signal read_cnt	: std_logic_vector(3 downto 0);
	signal image_cnt	: std_logic_vector(18 downto 0) := (others=>'0');
	signal img_state	: std_logic_vector(3 downto 0);
	signal r_clk_buf : std_logic;
	signal g_clk_buf : std_logic;
	signal b_clk_buf : std_logic;
begin
	process(reset,clock,next_cycle,s_clk)
	begin
		if(reset='1') then
			tx_req <= '0';
			adc_reset <= '0';
			img_state <= (others=>'0');
			cmd1_buf <= (others=>'0');
			r_clk_buf <= '0';
			g_clk_buf <= '0';
			b_clk_buf <= '0';
			image_cnt <= (others=>'0');
			tx_data <= (others=>'0');
			next_cycle <= idle;
		elsif(clock'event and clock='1') then
			case current_cycle is
				when idle =>
					adc_reset <= '0';
					tx_req <= '0';
					image_cnt <= (others=>'0');
					img_state <= (others=>'0');
					r_clk_buf <= '0';
					g_clk_buf <= '0';
					b_clk_buf <= '0';
					tx_data <= (others=>'0');
					-- 荐脚 脚龋 八荤
					if(s_clk = '1' and s_clk_buf='0') then
						cmd1_buf <= rx_command;
						next_cycle <= 	cmd_rcv1;
					end if;
				-- 荐脚 疙飞绢 盒籍
				when cmd_rcv1 =>
					if(cmd1_buf = X"58" or cmd1_buf = X"50" or cmd1_buf = X"4C" or cmd1_buf = X"44" or  cmd1_buf = X"45" or cmd1_buf = X"57" or cmd1_buf = X"59" or cmd1_buf = X"4A" or cmd1_buf = X"49" or cmd1_buf = X"5A" or cmd1_buf = X"53") then
						next_cycle <= cmd_run;
					else
						if(s_clk = '1' and s_clk_buf='0') then
							next_cycle <= 	cmd_run;
						end if; 
					end if;
				when cmd_run =>
					if(cmd1_buf = X"53") then   -- image scan state
						next_cycle <= iscan;
						image_cnt <= (others=>'0');
					end if;
				when iscan =>
					if(image_cnt >= "1001100111111100000") then
						image_cnt <= (others=>'0');
						adc_reset <= '0';
						cmd1_buf <= (others =>'0');
						next_cycle <= idle;	
					else
						adc_reset <= '1';
						r_clk_buf <= r_clk;
						g_clk_buf <= g_clk;
						b_clk_buf <= b_clk;
						if(img_state = "0000" ) then
							tx_req <= '0';
							if(r_clk_buf /= r_clk ) then
								img_state <= "0001";
							end if;
						elsif(img_state = "0001") then
							if(tx_ok = '0') then
								tx_data <= top_img;
								tx_req <= '1';
								image_cnt <= image_cnt + '1';
								next_cycle <= wait_n;  
								img_state <= "0010";
							end if;
						elsif(img_state = "0010") then
							img_state <= "0011";
						elsif(img_state = "0011") then
							if(tx_ok = '0') then
								tx_data <= bot_img;
								tx_req <= '1';
								image_cnt <= image_cnt + '1';
								img_state <= "0100";
							else
								tx_req <= '0';
							end if;
						elsif(img_state = "0100") then
							img_state <= "0000";
						end if;
					end if;
				when write =>
					next_cycle <= idle;
				when read =>
					next_cycle <= data_tx;
				when sdata_tx =>
					next_cycle <= wait_n;  
				when wait_n =>
					next_cycle <= iscan;
				when data_tx =>
					if(tx_ok = '0') then
						tx_req <= '1';
						read_cnt <= read_cnt + '1';
						next_cycle <= cmd_run;  
					end if;
			end case;
			s_clk_buf <= s_clk;
		end if;
		current_cycle <= next_cycle;
	end process;
end Behavioral;