📄 sys_con.vhd
字号:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity sys_con is
port(
clock : in std_logic;
reset : in std_logic;
tx_data : in std_logic_vector(7 downto 0);
tx_ok : out std_logic;
tx_req : in std_logic;
temp_remocon_data : out std_logic_vector(7 downto 0);
s_clk : out std_logic;
serial_tx : out std_logic;
serial_rx : in std_logic
);
end sys_con;
architecture Behavioral of sys_con is
----------------------------------------------------------------------------------------
-- serial comm Receiver
----------------------------------------------------------------------------------------
type master_state is ( idle,
remocon_start,
remocon_data_check,
remocon_data_end
);
signal r_current_cycle,r_next_cycle : master_state;
signal remocon_clock : std_logic;
signal rx_clock : std_logic;
signal temp_remocon_clock : std_logic;
signal remocon_clock_count : std_logic_vector(11 downto 0);
signal rx_clock_count : std_logic_vector(11 downto 0);
signal clock_on : std_logic;
signal t_clk_on : std_logic;
signal start_bit : std_logic;
signal remocon_data : std_logic_vector(7 downto 0);
signal stop_bit : std_logic;
signal bit_count : std_logic_vector(3 downto 0);
----------------------------------------------------------------------------------------
-- serial comm Transmit
----------------------------------------------------------------------------------------
type trans_master is ( tidle,
t_start
);
signal t_current,t_next : trans_master;
signal tx_clk : std_logic;
signal tx_cnt : std_logic_vector(3 downto 0);
signal tx_req_buf : std_logic;
signal tx_buf : std_logic_vector(7 downto 0);
begin
process(reset,clock) -- Serial transmit
begin
if(reset='1') then
t_next <= tidle;
serial_tx <= '1';
tx_cnt <= (others=>'0');
tx_ok <= '0';
t_clk_on <= '0';
elsif(clock'event and clock='1') then
case t_current is
when tidle =>
tx_ok <= '0';
if(tx_req_buf = '0' and tx_req='1') then
tx_ok <= '1';
tx_buf <= tx_data;
serial_tx <= '1';
tx_cnt <= (others=>'0');
t_clk_on <= '1';
t_next <= t_start; ---!!!!
end if;
tx_req_buf <= tx_req;
when t_start =>
tx_ok <= '1';
if(tx_clk = '0' and remocon_clock='1') then
case tx_cnt is
when "0000" =>
serial_tx <= '0'; -- start bit
tx_cnt <= tx_cnt + '1';
when "0001" =>
serial_tx <= tx_buf(0);
tx_cnt <= tx_cnt + '1';
when "0010" =>
serial_tx <= tx_buf(1);
tx_cnt <= tx_cnt + '1';
when "0011" =>
serial_tx <= tx_buf(2);
tx_cnt <= tx_cnt + '1';
when "0100" =>
serial_tx <= tx_buf(3);
tx_cnt <= tx_cnt + '1';
when "0101" =>
serial_tx <= tx_buf(4);
tx_cnt <= tx_cnt + '1';
when "0110" =>
serial_tx <= tx_buf(5);
tx_cnt <= tx_cnt + '1';
when "0111" =>
serial_tx <= tx_buf(6);
tx_cnt <= tx_cnt + '1';
when "1000" =>
serial_tx <= tx_buf(7);
tx_cnt <= tx_cnt + '1';
when "1001" =>
serial_tx <= '1'; -- Stop bit
tx_cnt <= tx_cnt + '1';
when "1010" =>
t_next <= tidle;
when others => t_next <= tidle;
end case;
end if;
end case;
tx_clk <= remocon_clock;
end if;
t_current <= t_next;
end process;
process (reset,clock,serial_rx,rx_clock) -- Serial receiver
begin
if(reset = '1')then
temp_remocon_clock <= '0';
clock_on <= '0';
start_bit <= '0';
remocon_data <= (others => '0');
temp_remocon_data <= (others => '0');
stop_bit <= '0';
bit_count <= (others => '0');
s_clk <= '0';
r_next_cycle <= idle;
elsif (clock'event and clock = '1')then
temp_remocon_clock <= rx_clock;
case r_current_cycle is
when idle =>
s_clk <= '0';
temp_remocon_data <= (others => '0');
if(serial_rx = '0')then
clock_on <= '1';
r_next_cycle <= remocon_start;
end if;
when remocon_start =>
if(rx_clock = '1' and temp_remocon_clock = '0')then
case bit_count is
when "0000" =>
start_bit <= serial_rx;
when "0001" =>
remocon_data(0) <= serial_rx;
when "0010" =>
remocon_data(1) <= serial_rx;
when "0011" =>
remocon_data(2) <= serial_rx;
when "0100" =>
remocon_data(3) <= serial_rx;
when "0101" =>
remocon_data(4) <= serial_rx;
when "0110" =>
remocon_data(5) <= serial_rx;
when "0111" =>
remocon_data(6) <= serial_rx;
when "1000" =>
remocon_data(7) <= serial_rx;
when others =>
stop_bit <= serial_rx;
r_next_cycle <= remocon_data_check;
end case;
bit_count <= bit_count + 1;
end if;
when remocon_data_check =>
clock_on <= '0';
bit_count <= "0000";
if(remocon_data = "00000000")then
r_next_cycle <= idle;
else
if(start_bit = '0' and stop_bit = '1')then
temp_remocon_data <= remocon_data;
r_next_cycle <= remocon_data_end;
else
r_next_cycle <= idle;
end if;
end if;
when remocon_data_end =>
s_clk <= '1';
r_next_cycle <= idle;
end case;
r_current_cycle <= r_next_cycle;
end if;
end process;
-----------------------------------------------------------------------------------------------------------
-- remocon clock generater
-----------------------------------------------------------------------------------------------------------
remocon_clock_p : process (reset,clock,clock_on,t_clk_on)
begin
if(reset = '1')then
-- module signal
remocon_clock <= '0';
remocon_clock_count <= (others =>'0');
elsif(clock'event and clock = '1')then
if(t_clk_on = '1')then
if(remocon_clock_count = "1010") then
remocon_clock <= not remocon_clock;
remocon_clock_count <= (others => '0');
else
remocon_clock_count <= remocon_clock_count + 1;
end if;
else
remocon_clock <= '0';
remocon_clock_count <= (others =>'0');
end if;
end if;
end process;
process (reset,clock,clock_on) -- Rx clock
begin
if(reset = '1')then
-- module signal
rx_clock <= '0';
rx_clock_count <= (others =>'0');
elsif(clock'event and clock = '1')then
if(clock_on = '1')then
if(rx_clock_count = "1010") then
rx_clock <= not rx_clock;
rx_clock_count <= (others => '0');
else
rx_clock_count <= rx_clock_count + 1;
end if;
else
rx_clock <= '0';
rx_clock_count <= (others =>'0');
end if;
end if;
end process;
end Behavioral;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -