lf_therapy_main.vhd

low frequency therapy system control VHDL code

-- Project 		: Low Frequency Therapy
-- Programmer	: Byungchan Son
-- Function		: 
-- Language		: VHDL
--============================================================================
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
--============================================================================
-- 涝免仿 器飘 沥狼
--============================================================================
entity lf_therapy_main is
	port(
		-- system signal
		reset_n : in std_logic;
		clock : in std_logic;
		-- CPU interface
		gcs_n : in std_logic;
		we_n : in std_logic;
		oe_n : in std_logic;
		addr : in std_logic_vector(6 downto 0);
		data : inout std_logic_vector(7 downto 0);
		-- dac
		s_din : out std_logic;
		s_sclk : out std_logic;
		s1_cs_n : out std_logic;
		s2_cs_n : out std_logic;
		s3_cs_n : out std_logic;
		s4_cs_n : out std_logic;
		-- pulse out
		p1_pp : out std_logic;
		p1_pm : out std_logic;
		p1_mp : out std_logic;
		p1_mm : out std_logic;
		p2_pp : out std_logic;
		p2_pm : out std_logic;
		p2_mp : out std_logic;
		p2_mm : out std_logic;
		p3_pp : out std_logic;
		p3_pm : out std_logic;
		p3_mp : out std_logic;
		p3_mm : out std_logic;
		p4_pp : out std_logic;
		p4_pm : out std_logic;
		p4_mp : out std_logic;
		p4_mm : out std_logic;
		-- LCD
		lcd_reset : out std_logic;
		lcd_spena : out std_logic;
		lcd_spck : out std_logic;
		lcd_spda : out std_logic;
		lcd_vcom : out std_logic;
		lcd_bright_out : out std_logic
		);
end lf_therapy_main;
--============================================================================
-- 备炼 沥狼
--============================================================================
architecture lf_therapy_main_a of lf_therapy_main is
--------------------------------------------------------------------
-- 郴何 葛碘
--------------------------------------------------------------------
component bus_control
	port(
		-- system signal
		reset : in std_logic;
		clock : in std_logic;
		-- CPU interface
		gcs_n : in std_logic;
		we_n : in std_logic;
		oe_n : in std_logic;
		addr : in std_logic_vector(6 downto 0);
		data_in : in std_logic_vector(7 downto 0);
		data_out : out std_logic_vector(7 downto 0);
		-- pulse control
		p1_voltage : out std_logic_vector(7 downto 0);
		p1_width : out std_logic_vector(7 downto 0);
		p1_onoff : out std_logic;
		p2_voltage : out std_logic_vector(7 downto 0);
		p2_width : out std_logic_vector(7 downto 0);
		p2_onoff : out std_logic;
		p3_voltage : out std_logic_vector(7 downto 0);
		p3_width : out std_logic_vector(7 downto 0);
		p3_onoff : out std_logic;
		p4_voltage : out std_logic_vector(7 downto 0);
		p4_width : out std_logic_vector(7 downto 0);
		p4_onoff : out std_logic;
		period_flag : out std_logic;
		-- LCD
		lcd_spena : out std_logic;
		lcd_spck : out std_logic;
		lcd_spda : out std_logic;
		lcd_bright_out : out std_logic
		-- test signal
		);
end component;
component pulse_control
	port(
		-- system signal
		reset : in std_logic;
		clock : in std_logic;
		-- bus control
		p_width : in std_logic_vector(7 downto 0);
		period_flag : in std_logic;
		p_onoff : in std_logic;
		-- pulse out
		p_pp : out std_logic;
		p_pm : out std_logic;
		p_mp : out std_logic;
		p_mm : out std_logic
		-- test signal
		);
end component;
component dac_control
	port(
		-- system signal
		reset : in std_logic;
		clock : in std_logic;
		-- bus control
		p1_voltage : in std_logic_vector(7 downto 0);
		p2_voltage : in std_logic_vector(7 downto 0);
		p3_voltage : in std_logic_vector(7 downto 0);
		p4_voltage : in std_logic_vector(7 downto 0);
		-- dac
		s_din : out std_logic;
		s_sclk : out std_logic;
		s1_cs_n : out std_logic;
		s2_cs_n : out std_logic;
		s3_cs_n : out std_logic;
		s4_cs_n : out std_logic
		-- test signal
		);
end component;
--------------------------------------------------------------------
-- 郴何 脚龋
--------------------------------------------------------------------
signal reset : std_logic;
signal vcom_count : std_logic_vector(15 downto 0);
signal temp_vcom : std_logic;
signal p1_voltage : std_logic_vector(7 downto 0);
signal p1_width : std_logic_vector(7 downto 0);
signal p1_onoff : std_logic;
signal p2_voltage : std_logic_vector(7 downto 0);
signal p2_width : std_logic_vector(7 downto 0);
signal p2_onoff : std_logic;
signal p3_voltage : std_logic_vector(7 downto 0);
signal p3_width : std_logic_vector(7 downto 0);
signal p3_onoff : std_logic;
signal p4_voltage : std_logic_vector(7 downto 0);
signal p4_width : std_logic_vector(7 downto 0);
signal p4_onoff : std_logic;
signal period_flag : std_logic;
signal data_in : std_logic_vector(7 downto 0);
signal data_out : std_logic_vector(7 downto 0);
--------------------------------------------------------------------
-- 橇肺技辑 矫累
--------------------------------------------------------------------
begin
	----------------------------------------------------------------
	-- 郴何 葛碘 搬急
	----------------------------------------------------------------
	m1 : bus_control
	port map(
		-- system signal
		reset => reset,
		clock => clock,
		-- CPU interface
		gcs_n => gcs_n,
		we_n => we_n,
		oe_n => oe_n,
		addr => addr,
		data_in => data_in,
		data_out => data_out,
		-- pulse control
		p1_voltage => p1_voltage,
		p1_width => p1_width,
		p1_onoff => p1_onoff,
		p2_voltage => p2_voltage,
		p2_width => p2_width,
		p2_onoff => p2_onoff,
		p3_voltage => p3_voltage,
		p3_width => p3_width,
		p3_onoff => p3_onoff,
		p4_voltage => p4_voltage,
		p4_width => p4_width,
		p4_onoff => p4_onoff,
		period_flag => period_flag,
		-- LCD
		lcd_spena => lcd_spena,
		lcd_spck => lcd_spck,
		lcd_spda => lcd_spda,
		lcd_bright_out => lcd_bright_out
		);
	m2 : pulse_control
	port map(
		-- system signal
		reset => reset,
		clock => clock,
		-- bus control
		p_width => p1_width,
		period_flag => period_flag,
		p_onoff => p1_onoff,
		-- pulse out
		p_pp => p1_pp,
		p_pm => p1_pm,
		p_mp => p1_mp,
		p_mm => p1_mm
		-- test signal
		);
	m3 : pulse_control
	port map(
		-- system signal
		reset => reset,
		clock => clock,
		-- bus control
		p_width => p2_width,
		period_flag => period_flag,
		p_onoff => p2_onoff,
		-- pulse out
		p_pp => p2_pp,
		p_pm => p2_pm,
		p_mp => p2_mp,
		p_mm => p2_mm
		-- test signal
		);
	m4 : pulse_control
	port map(
		-- system signal
		reset => reset,
		clock => clock,
		-- bus control
		p_width => p3_width,
		period_flag => period_flag,
		p_onoff => p3_onoff,
		-- pulse out
		p_pp => p3_pp,
		p_pm => p3_pm,
		p_mp => p3_mp,
		p_mm => p3_mm
		-- test signal
		);
	m5 : pulse_control
	port map(
		-- system signal
		reset => reset,
		clock => clock,
		-- bus control
		p_width => p4_width,
		period_flag => period_flag,
		p_onoff => p4_onoff,
		-- pulse out
		p_pp => p4_pp,
		p_pm => p4_pm,
		p_mp => p4_mp,
		p_mm => p4_mm
		-- test signal
		);
	m6 : dac_control
	port map(
		-- system signal
		reset => reset,
		clock => clock,
		-- bus control
		p1_voltage => p1_voltage,
		p2_voltage => p2_voltage,
		p3_voltage => p3_voltage,
		p4_voltage => p4_voltage,
		-- dac
		s_din => s_din,
		s_sclk => s_sclk,
		s1_cs_n => s1_cs_n,
		s2_cs_n => s2_cs_n,
		s3_cs_n => s3_cs_n,
		s4_cs_n => s4_cs_n
		-- test signal
		);
	-------------------------------------------------------------------------
	-- 橇肺技辑 矫累
	-------------------------------------------------------------------------
	bus_data : process(
		reset,
		oe_n,
		gcs_n,
		data,
		data_out
		)
	begin
		if(reset = '1')then
			data <= (others => 'Z');
		else
			if(oe_n = '0' and gcs_n = '0')then
				data <= data_out;
			else
				data <= (others => 'Z');
				data_in <= data;
			end if;
		end if;
	end process;
	vcom_generator : process(
		reset,
		clock,
		temp_vcom,
		vcom_count
		)
	begin
		if(reset = '1')then
			-- 惑怕 扁拌
			-- 郴何 脚龋
			temp_vcom <= '0';
			vcom_count <= (others => '0');
		elsif(clock'event and clock = '1')then
			-- 荐脚 baudrate 努钒 惯积扁
			if(temp_vcom = '0')then
				if(vcom_count = "0100000000000000")then
					temp_vcom <= not temp_vcom;
                    vcom_count <= (others => '0');
				else
					vcom_count <= vcom_count + 1;
                end if;
			else
				if(vcom_count = "0100000000000000")then
					temp_vcom <= not temp_vcom;
                    vcom_count <= (others => '0');
				else
					vcom_count <= vcom_count + 1;
                end if;
			end if;
		end if;
	end process;
	----------------------------------------------------------------
	-- 肺流 脚龋
	----------------------------------------------------------------
	reset <= not reset_n;
	lcd_reset <= reset_n;
	lcd_vcom <= temp_vcom;
end lf_therapy_main_a;
--============================================================================
-- 场
--============================================================================