📄 dac_control.vhd
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--============================================================================
-- Project : Low Frequency Therapy
-- Programmer : Byungchan Son
-- Function :
-- Language : VHDL
--============================================================================
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
--============================================================================
-- 涝免仿 器飘 沥狼
--============================================================================
entity dac_control is
port(
-- system signal
reset : in std_logic;
clock : in std_logic;
-- bus control
p1_voltage : in std_logic_vector(7 downto 0);
p2_voltage : in std_logic_vector(7 downto 0);
p3_voltage : in std_logic_vector(7 downto 0);
p4_voltage : in std_logic_vector(7 downto 0);
-- dac
s_din : out std_logic;
s_sclk : out std_logic;
s1_cs_n : out std_logic;
s2_cs_n : out std_logic;
s3_cs_n : out std_logic;
s4_cs_n : out std_logic
-- test signal
);
end dac_control;
--============================================================================
-- 备炼 沥狼
--============================================================================
architecture dac_control_a of dac_control is
--------------------------------------------------------------------
-- 郴何 葛碘
--------------------------------------------------------------------
--------------------------------------------------------------------
-- 郴何 脚龋
--------------------------------------------------------------------
type dac_control_state is(
idle,
dac_start,
dac_clock_enable,
dac_clock_disable
);
-- state machine signal
signal current_state, next_state : dac_control_state;
-- data signal
signal count_5ms : std_logic_vector(19 downto 0);
signal dac_flag : std_logic;
signal dac_clock_count : std_logic_vector(5 downto 0);
signal dac_clock_flag : std_logic;
signal dac_bit_count : std_logic_vector(3 downto 0);
signal t_voltage : std_logic_vector(7 downto 0);
signal channel_count : std_logic_vector(1 downto 0);
--============================================================================
-- 橇肺技辑 矫累
--============================================================================
begin
----------------------------------------------------------------
-- 郴何 葛碘 搬急
----------------------------------------------------------------
----------------------------------------------------------------
-- 妻胶 林扁 惯积扁
----------------------------------------------------------------
gen_period : process(
reset,
clock,
count_5ms
)
begin
if(reset = '1')then
count_5ms <= (others => '0');
dac_flag <= '0';
elsif(clock'event and clock = '1')then
if(count_5ms = "01111010000100100000")then
count_5ms <= (others => '0');
dac_flag <= '1';
else
count_5ms <= count_5ms + 1;
dac_flag <= '0';
end if;
end if;
end process;
----------------------------------------------------------------
-- DAC
----------------------------------------------------------------
dac_out : process(
reset,
clock,
current_state,
next_state,
dac_clock_count,
dac_flag,
channel_count,
dac_clock_flag,
dac_bit_count
)
begin
if(reset = '1')then
next_state <= idle;
-- 寇何 免仿
s_din <= '0';
s_sclk <= '1';
s1_cs_n <= '1';
s2_cs_n <= '1';
s3_cs_n <= '1';
s4_cs_n <= '1';
-- 郴何 脚龋
dac_clock_count <= (others => '0');
dac_clock_flag <= '0';
dac_bit_count <= (others => '0');
t_voltage <= (others => '0');
channel_count <= (others => '0');
elsif(clock'event and clock = '1')then
if(dac_clock_count = "111111")then
dac_clock_count <= (others => '0');
dac_clock_flag <= '1';
else
dac_clock_count <= dac_clock_count + 1;
dac_clock_flag <= '0';
end if;
case current_state is
when idle =>
if(dac_flag = '1')then
if(channel_count = "00")then
t_voltage <= p1_voltage;
elsif(channel_count = "01")then
t_voltage <= p2_voltage;
elsif(channel_count = "10")then
t_voltage <= p3_voltage;
else
t_voltage <= p4_voltage;
end if;
next_state <= dac_start;
end if;
when dac_start =>
if(dac_clock_flag = '1')then
s_sclk <= '1';
if(channel_count = "00")then
s1_cs_n <= '0';
elsif(channel_count = "01")then
s2_cs_n <= '0';
elsif(channel_count = "10")then
s3_cs_n <= '0';
else
s4_cs_n <= '0';
end if;
case dac_bit_count is
when "0000" =>
s_din <= '0';
when "0001" =>
s_din <= '0';
when "0010" =>
s_din <= '0';
when "0011" =>
s_din <= '0';
when "0100" =>
s_din <= t_voltage(7);
when "0101" =>
s_din <= t_voltage(6);
when "0110" =>
s_din <= t_voltage(5);
when "0111" =>
s_din <= t_voltage(4);
when "1000" =>
s_din <= t_voltage(3);
when "1001" =>
s_din <= t_voltage(2);
when "1010" =>
s_din <= t_voltage(1);
when "1011" =>
s_din <= t_voltage(0);
when "1100" =>
s_din <= '0';
when "1101" =>
s_din <= '0';
when "1110" =>
s_din <= '0';
when others =>
s_din <= '0';
end case;
next_state <= dac_clock_enable;
end if;
when dac_clock_enable =>
if(dac_clock_flag = '1')then
s_sclk <= '0';
if(dac_bit_count = "1111")then
next_state <= dac_clock_disable;
else
next_state <= dac_start;
end if;
dac_bit_count <= dac_bit_count + 1;
end if;
when dac_clock_disable =>
if(dac_clock_flag = '1')then
s_sclk <= '1';
s1_cs_n <= '1';
s2_cs_n <= '1';
s3_cs_n <= '1';
s4_cs_n <= '1';
channel_count <= channel_count + 1;
next_state <= idle;
end if;
end case;
end if;
current_state <= next_state;
end process;
----------------------------------------------------------------
-- 肺流 脚龋
----------------------------------------------------------------
end dac_control_a;
--============================================================================
-- 场
--============================================================================
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