uart.vhd

infra pen controller, cmos sensor control and sdram control

--============================================================================
-- Project 		: line Control
-- Programmer	: Byungchan Son
-- Function		: 寇何 CPU 牢磐其捞胶, 疙飞 荐脚
-- Language		: VHDL
--============================================================================
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
--============================================================================
-- 涝免仿 器飘 沥狼
--============================================================================
entity asynchronous_receiver_transmitter is
	port(
		-- system signal
		reset : in std_logic;
		clock : in std_logic;
		-- 寇何 脚龋
		usb_data_out : out std_logic_vector(7 downto 0);
		usb_data_in : in std_logic_vector(7 downto 0);
		usb_data_hz : out std_logic;
		usb_rxf : in std_logic;
		usb_txe : in std_logic;
		usb_rd_n : out std_logic;
		usb_wr : out std_logic;
		-- 滚胶 牢磐其捞胶
		com_rx_data : out std_logic_vector(31 downto 0);
		com_rx_req : out std_logic;
		com_rx_ack : in std_logic;
		com_tx_data : in std_logic_vector(31 downto 0);
		com_tx_req : in std_logic;
		com_tx_ack : out std_logic;
		image_tx_req : in std_logic_vector(1 downto 0);
		image_tx_ack : out std_logic;
		image_tx_no : in std_logic_vector(3 downto 0);
		sync_image_tx_req : in std_logic;
		pos_image_tx_req : in std_logic;
		pos_image_tx_ack : out std_logic;
		-- sdram control
		image_data : in std_logic_vector(127 downto 0)
		);
end asynchronous_receiver_transmitter;
--============================================================================
-- 备炼 沥狼