traffic_vhd.sdo

vhdl实现的交通灯

// Copyright (C) 1991-2007 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files from any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, Altera MegaCore Function License 
// Agreement, or other applicable license agreement, including, 
// without limitation, that your use is for the sole purpose of 
// programming logic devices manufactured by Altera and sold by 
// Altera or its authorized distributors.  Please refer to the 
// applicable agreement for further details.


// 
// Device: Altera EP1C3T144C8 Package TQFP144
// 

// 
// This SDF file should be used for ModelSim-Altera (VHDL) only
// 

(DELAYFILE
  (SDFVERSION "2.1")
  (DESIGN "traffic")
  (DATE "03/19/2009 17:37:37")
  (VENDOR "Altera")
  (PROGRAM "Quartus II")
  (VERSION "Version 7.2 Build 203 02/05/2008 Service Pack 2 SJ Full Version")
  (DIVIDER .)
  (TIMESCALE 1 ps)

  (CELL
    (CELLTYPE "cyclone_asynch_io")
    (INSTANCE clk_aI.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1469:1469:1469) (1469:1469:1469))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a0_a_CLK_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (560:560:560) (540:540:540))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a0_a_DATAB_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (498:498:498) (510:510:510))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE con_a0_a.lecomb)
    (DELAY
      (ABSOLUTE
        (IOPATH datab regin (607:607:607) (607:607:607))
        (IOPATH datab cout0 (423:423:423) (423:423:423))
        (IOPATH datab cout1 (432:432:432) (432:432:432))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE con_a0_a.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (711:711:711) (711:711:711))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a1_a_CLK_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (560:560:560) (540:540:540))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a1_a_DATAA_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (515:515:515) (529:529:529))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE con_a1_a.lecomb)
    (DELAY
      (ABSOLUTE
        (IOPATH dataa regin (738:738:738) (738:738:738))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH dataa cout0 (564:564:564) (564:564:564))
        (IOPATH cin0 cout0 (78:78:78) (78:78:78))
        (IOPATH dataa cout1 (575:575:575) (575:575:575))
        (IOPATH cin1 cout1 (80:80:80) (80:80:80))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE con_a1_a.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (711:711:711) (711:711:711))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a2_a_CLK_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (560:560:560) (540:540:540))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a2_a_DATAA_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (521:521:521) (533:533:533))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE con_a2_a.lecomb)
    (DELAY
      (ABSOLUTE
        (IOPATH dataa regin (738:738:738) (738:738:738))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH dataa cout0 (564:564:564) (564:564:564))
        (IOPATH cin0 cout0 (78:78:78) (78:78:78))
        (IOPATH dataa cout1 (575:575:575) (575:575:575))
        (IOPATH cin1 cout1 (80:80:80) (80:80:80))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE con_a2_a.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (711:711:711) (711:711:711))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a3_a_CLK_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (560:560:560) (540:540:540))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a3_a_DATAB_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (500:500:500) (513:513:513))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE con_a3_a.lecomb)
    (DELAY
      (ABSOLUTE
        (IOPATH datab regin (607:607:607) (607:607:607))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH datab cout0 (423:423:423) (423:423:423))
        (IOPATH cin0 cout0 (78:78:78) (78:78:78))
        (IOPATH datab cout1 (432:432:432) (432:432:432))
        (IOPATH cin1 cout1 (80:80:80) (80:80:80))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE con_a3_a.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (711:711:711) (711:711:711))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a4_a_CLK_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (560:560:560) (540:540:540))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a4_a_DATAB_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (493:493:493) (507:507:507))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE con_a4_a.lecomb)
    (DELAY
      (ABSOLUTE
        (IOPATH datab regin (607:607:607) (607:607:607))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH datab cout (583:583:583) (583:583:583))
        (IOPATH cin0 cout (178:178:178) (178:178:178))
        (IOPATH cin1 cout (157:157:157) (157:157:157))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE con_a4_a.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (711:711:711) (711:711:711))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a5_a_CLK_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (560:560:560) (540:540:540))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a5_a_DATAB_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (499:499:499) (510:510:510))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE con_a5_a.lecomb)
    (DELAY
      (ABSOLUTE
        (IOPATH datab regin (607:607:607) (607:607:607))
        (IOPATH cin regin (839:839:839) (839:839:839))
        (IOPATH datab cout0 (423:423:423) (423:423:423))
        (IOPATH datab cout1 (432:432:432) (432:432:432))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE con_a5_a.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (711:711:711) (711:711:711))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a6_a_CLK_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (560:560:560) (540:540:540))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a6_a_DATAA_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (515:515:515) (529:529:529))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE con_a6_a.lecomb)
    (DELAY
      (ABSOLUTE
        (IOPATH dataa regin (738:738:738) (738:738:738))
        (IOPATH cin regin (839:839:839) (839:839:839))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH dataa cout0 (564:564:564) (564:564:564))
        (IOPATH cin0 cout0 (78:78:78) (78:78:78))
        (IOPATH dataa cout1 (575:575:575) (575:575:575))
        (IOPATH cin1 cout1 (80:80:80) (80:80:80))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE con_a6_a.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (711:711:711) (711:711:711))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a7_a_CLK_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (560:560:560) (540:540:540))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a7_a_DATAA_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (522:522:522) (534:534:534))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE con_a7_a.lecomb)
    (DELAY
      (ABSOLUTE
        (IOPATH dataa regin (738:738:738) (738:738:738))
        (IOPATH cin regin (839:839:839) (839:839:839))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH dataa cout0 (564:564:564) (564:564:564))
        (IOPATH cin0 cout0 (78:78:78) (78:78:78))
        (IOPATH dataa cout1 (575:575:575) (575:575:575))
        (IOPATH cin1 cout1 (80:80:80) (80:80:80))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE con_a7_a.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (711:711:711) (711:711:711))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a8_a_CLK_routing_wire_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH datain dataout (560:560:560) (540:540:540))
        (IOPATH datainglitch dataout (250:250:250) (250:250:250))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_routing_wire")
    (INSTANCE con_a8_a_DATAB_routing_wire_inst)