traffic.vho

vhdl实现的交通灯

con_a3_a_CIN0_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a2_a_a107,
	dataout => con_a3_a_CIN0_driver);

con_a3_a_CIN1_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a2_a_a107COUT1,
	dataout => con_a3_a_CIN1_driver);

con_a3_a : cyclone_lcell
-- Equation(s):
-- con(3) = DFFEAS(con(3) $ con_a2_a_a107, GLOBAL(clk_acombout), VCC, , , , , , )
-- con_a3_a_a109 = CARRY(!con_a2_a_a107 # !con(3))
-- con_a3_a_a109COUT1 = CARRY(!con_a2_a_a107COUT1 # !con(3))

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	lut_mask => "3c3f",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	clk => con_a3_a_CLK_driver,
	datab => con_a3_a_DATAB_driver,
	aclr => GND,
	cin0 => con_a3_a_CIN0_driver,
	cin1 => con_a3_a_CIN1_driver,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => con(3),
	cout0 => con_a3_a_a109,
	cout1 => con_a3_a_a109COUT1);

con_a4_a_CLK_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => clk_acombout,
	dataout => con_a4_a_CLK_driver);

con_a4_a_DATAB_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con(4),
	dataout => con_a4_a_DATAB_driver);

con_a4_a_CIN0_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a3_a_a109,
	dataout => con_a4_a_CIN0_driver);

con_a4_a_CIN1_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a3_a_a109COUT1,
	dataout => con_a4_a_CIN1_driver);

con_a4_a : cyclone_lcell
-- Equation(s):
-- con(4) = DFFEAS(con(4) $ !con_a3_a_a109, GLOBAL(clk_acombout), VCC, , , , , , )
-- con_a4_a_a111 = CARRY(con(4) & !con_a3_a_a109COUT1)

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	lut_mask => "c30c",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	clk => con_a4_a_CLK_driver,
	datab => con_a4_a_DATAB_driver,
	aclr => GND,
	cin0 => con_a4_a_CIN0_driver,
	cin1 => con_a4_a_CIN1_driver,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => con(4),
	cout => con_a4_a_a111);

con_a5_a_CLK_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => clk_acombout,
	dataout => con_a5_a_CLK_driver);

con_a5_a_DATAB_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con(5),
	dataout => con_a5_a_DATAB_driver);

con_a5_a_CIN_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a4_a_a111,
	dataout => con_a5_a_CIN_driver);

con_a5_a : cyclone_lcell
-- Equation(s):
-- con(5) = DFFEAS(con(5) $ con_a4_a_a111, GLOBAL(clk_acombout), VCC, , , , , , )
-- con_a5_a_a113 = CARRY(!con_a4_a_a111 # !con(5))
-- con_a5_a_a113COUT1 = CARRY(!con_a4_a_a111 # !con(5))

-- pragma translate_off
GENERIC MAP (
	cin_used => "true",
	lut_mask => "3c3f",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	clk => con_a5_a_CLK_driver,
	datab => con_a5_a_DATAB_driver,
	aclr => GND,
	cin => con_a5_a_CIN_driver,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => con(5),
	cout0 => con_a5_a_a113,
	cout1 => con_a5_a_a113COUT1);

con_a6_a_CLK_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => clk_acombout,
	dataout => con_a6_a_CLK_driver);

con_a6_a_DATAA_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con(6),
	dataout => con_a6_a_DATAA_driver);

con_a6_a_CIN_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a4_a_a111,
	dataout => con_a6_a_CIN_driver);

con_a6_a_CIN0_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a5_a_a113,
	dataout => con_a6_a_CIN0_driver);

con_a6_a_CIN1_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a5_a_a113COUT1,
	dataout => con_a6_a_CIN1_driver);

con_a6_a : cyclone_lcell
-- Equation(s):
-- con(6) = DFFEAS(con(6) $ (!(!con_a4_a_a111 & con_a5_a_a113) # (con_a4_a_a111 & con_a5_a_a113COUT1)), GLOBAL(clk_acombout), VCC, , , , , , )
-- con_a6_a_a117 = CARRY(con(6) & (!con_a5_a_a113))
-- con_a6_a_a117COUT1 = CARRY(con(6) & (!con_a5_a_a113COUT1))

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	cin_used => "true",
	lut_mask => "a50a",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	clk => con_a6_a_CLK_driver,
	dataa => con_a6_a_DATAA_driver,
	aclr => GND,
	cin => con_a6_a_CIN_driver,
	cin0 => con_a6_a_CIN0_driver,
	cin1 => con_a6_a_CIN1_driver,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => con(6),
	cout0 => con_a6_a_a117,
	cout1 => con_a6_a_a117COUT1);

con_a7_a_CLK_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => clk_acombout,
	dataout => con_a7_a_CLK_driver);

con_a7_a_DATAA_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con(7),
	dataout => con_a7_a_DATAA_driver);

con_a7_a_CIN_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a4_a_a111,
	dataout => con_a7_a_CIN_driver);

con_a7_a_CIN0_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a6_a_a117,
	dataout => con_a7_a_CIN0_driver);

con_a7_a_CIN1_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a6_a_a117COUT1,
	dataout => con_a7_a_CIN1_driver);

con_a7_a : cyclone_lcell
-- Equation(s):
-- con(7) = DFFEAS(con(7) $ ((!con_a4_a_a111 & con_a6_a_a117) # (con_a4_a_a111 & con_a6_a_a117COUT1)), GLOBAL(clk_acombout), VCC, , , , , , )
-- con_a7_a_a119 = CARRY(!con_a6_a_a117 # !con(7))
-- con_a7_a_a119COUT1 = CARRY(!con_a6_a_a117COUT1 # !con(7))

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	cin_used => "true",
	lut_mask => "5a5f",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	clk => con_a7_a_CLK_driver,
	dataa => con_a7_a_DATAA_driver,
	aclr => GND,
	cin => con_a7_a_CIN_driver,
	cin0 => con_a7_a_CIN0_driver,
	cin1 => con_a7_a_CIN1_driver,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => con(7),
	cout0 => con_a7_a_a119,
	cout1 => con_a7_a_a119COUT1);

con_a8_a_CLK_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => clk_acombout,
	dataout => con_a8_a_CLK_driver);

con_a8_a_DATAB_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con(8),
	dataout => con_a8_a_DATAB_driver);

con_a8_a_CIN_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a4_a_a111,
	dataout => con_a8_a_CIN_driver);

con_a8_a_CIN0_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a7_a_a119,
	dataout => con_a8_a_CIN0_driver);

con_a8_a_CIN1_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a7_a_a119COUT1,
	dataout => con_a8_a_CIN1_driver);

con_a8_a : cyclone_lcell
-- Equation(s):
-- con(8) = DFFEAS(con(8) $ !(!con_a4_a_a111 & con_a7_a_a119) # (con_a4_a_a111 & con_a7_a_a119COUT1), GLOBAL(clk_acombout), VCC, , , , , , )
-- con_a8_a_a115 = CARRY(con(8) & !con_a7_a_a119)
-- con_a8_a_a115COUT1 = CARRY(con(8) & !con_a7_a_a119COUT1)

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	cin_used => "true",
	lut_mask => "c30c",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	clk => con_a8_a_CLK_driver,
	datab => con_a8_a_DATAB_driver,
	aclr => GND,
	cin => con_a8_a_CIN_driver,
	cin0 => con_a8_a_CIN0_driver,
	cin1 => con_a8_a_CIN1_driver,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => con(8),
	cout0 => con_a8_a_a115,
	cout1 => con_a8_a_a115COUT1);

con_a9_a_CLK_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => clk_acombout,
	dataout => con_a9_a_CLK_driver);

con_a9_a_DATAA_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con(9),
	dataout => con_a9_a_DATAA_driver);

con_a9_a_CIN_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a4_a_a111,
	dataout => con_a9_a_CIN_driver);

con_a9_a_CIN0_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a8_a_a115,
	dataout => con_a9_a_CIN0_driver);

con_a9_a_CIN1_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con_a8_a_a115COUT1,
	dataout => con_a9_a_CIN1_driver);

con_a9_a : cyclone_lcell
-- Equation(s):
-- con(9) = DFFEAS(con(9) $ ((!con_a4_a_a111 & con_a8_a_a115) # (con_a4_a_a111 & con_a8_a_a115COUT1)), GLOBAL(clk_acombout), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	cin_used => "true",
	lut_mask => "5a5a",
	operation_mode => "normal",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	clk => con_a9_a_CLK_driver,
	dataa => con_a9_a_DATAA_driver,
	aclr => GND,
	cin => con_a9_a_CIN_driver,
	cin0 => con_a9_a_CIN0_driver,
	cin1 => con_a9_a_CIN1_driver,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => con(9));

hz_a122_DATAA_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con(1),
	dataout => hz_a122_DATAA_driver);

hz_a122_DATAB_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con(0),
	dataout => hz_a122_DATAB_driver);

hz_a122_DATAC_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con(2),
	dataout => hz_a122_DATAC_driver);

hz_a122_DATAD_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con(3),
	dataout => hz_a122_DATAD_driver);

hz_a122 : cyclone_lcell
-- Equation(s):
-- hz_a122_combout = !con(1) & !con(0) & !con(2) & !con(3)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0001",
	operation_mode => "normal",
	output_mode => "comb_only",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	dataa => hz_a122_DATAA_driver,
	datab => hz_a122_DATAB_driver,
	datac => hz_a122_DATAC_driver,
	datad => hz_a122_DATAD_driver,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => hz_a122_combout);

hz_a123_DATAC_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con(5),
	dataout => hz_a123_DATAC_driver);

hz_a123_DATAD_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con(4),
	dataout => hz_a123_DATAD_driver);

hz_a123 : cyclone_lcell
-- Equation(s):
-- hz_a123_combout = !con(5) & !con(4)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "000f",
	operation_mode => "normal",
	output_mode => "comb_only",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	datac => hz_a123_DATAC_driver,
	datad => hz_a123_DATAD_driver,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => hz_a123_combout);

hz_a124_DATAA_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con(8),
	dataout => hz_a124_DATAA_driver);

hz_a124_DATAB_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con(6),
	dataout => hz_a124_DATAB_driver);

hz_a124_DATAC_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => con(7),
	dataout => hz_a124_DATAC_driver);

hz_a124_DATAD_routing_wire_inst : cyclone_routing_wire
PORT MAP (
	datain => hz_a123_combout,
	dataout => hz_a124_DATAD_driver);

hz_a124 : cyclone_lcell
-- Equation(s):
-- hz_a124_combout = !con(8) & !con(6) & !con(7) & hz_a123_combout

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0100",
	operation_mode => "normal",
	output_mode => "comb_only",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	dataa => hz_a124_DATAA_driver,
	datab => hz_a124_DATAB_driver,
	datac => hz_a124_DATAC_driver,
	datad => hz_a124_DATAD_driver,
	devclrn => ww_devclrn,
	devpor => ww_devpor,