hanshu.fit.summary

用FPGA做的DDS函数信号发生器

Fitter Status : Successful - Sun Aug 17 20:56:44 2008
Quartus II Version : 5.1 Build 213 01/19/2006 SP 1 SJ Full Version
Revision Name : hanshu
Top-level Entity Name : hanshu
Family : Cyclone II
Device : EP2C5T144C8
Timing Models : Preliminary
Total logic elements : 1,373 / 4,608 ( 30 % )
Total registers : 42
Total pins : 40 / 89 ( 45 % )
Total virtual pins : 0
Total memory bits : 2,560 / 119,808 ( 2 % )
Embedded Multiplier 9-bit elements : 4 / 26 ( 15 % )
Total PLLs : 0 / 2 ( 0 % )