hanshu.map.qmsg

用FPGA做的DDS函数信号发生器

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sM sM:inst5 " "Info: Elaborating entity \"sM\" for hierarchy \"sM:inst5\"" {  } { { "hanshu.bdf" "inst5" { Schematic "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/hanshu.bdf" { { -48 624 784 32 "inst5" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus51/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus51/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "altsyncram.tdf" "" { Text "d:/altera/quartus51/libraries/megafunctions/altsyncram.tdf" 425 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram sM:inst5\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"sM:inst5\|altsyncram:altsyncram_component\"" {  } { { "sM.vhd" "altsyncram_component" { Text "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/sM.vhd" 81 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_pov.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_pov.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_pov " "Info: Found entity 1: altsyncram_pov" {  } { { "db/altsyncram_pov.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/db/altsyncram_pov.tdf" 36 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_pov sM:inst5\|altsyncram:altsyncram_component\|altsyncram_pov:auto_generated " "Info: Elaborating entity \"altsyncram_pov\" for hierarchy \"sM:inst5\|altsyncram:altsyncram_component\|altsyncram_pov:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "d:/altera/quartus51/libraries/megafunctions/altsyncram.tdf" 903 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "chuan1 chuan1:inst4 " "Info: Elaborating entity \"chuan1\" for hierarchy \"chuan1:inst4\"" {  } { { "hanshu.bdf" "inst4" { Schematic "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/hanshu.bdf" { { -48 456 584 48 "inst4" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "JIA.vhd 2 1 " "Warning: Using design file JIA.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 jia-SYN " "Info: Found design unit 1: jia-SYN" {  } { { "JIA.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/JIA.vhd" 50 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 JIA " "Info: Found entity 1: JIA" {  } { { "JIA.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/JIA.vhd" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "JIA JIA:inst3 " "Info: Elaborating entity \"JIA\" for hierarchy \"JIA:inst3\"" {  } { { "hanshu.bdf" "inst3" { Schematic "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/hanshu.bdf" { { 64 624 784 160 "inst3" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus51/libraries/megafunctions/lpm_add_sub.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus51/libraries/megafunctions/lpm_add_sub.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_add_sub " "Info: Found entity 1: lpm_add_sub" {  } { { "lpm_add_sub.tdf" "" { Text "d:/altera/quartus51/libraries/megafunctions/lpm_add_sub.tdf" 100 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_add_sub JIA:inst3\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborating entity \"lpm_add_sub\" for hierarchy \"JIA:inst3\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "JIA.vhd" "lpm_add_sub_component" { Text "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/JIA.vhd" 75 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/add_sub_pmg.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/add_sub_pmg.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 add_sub_pmg " "Info: Found entity 1: add_sub_pmg" {  } { { "db/add_sub_pmg.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/db/add_sub_pmg.tdf" 24 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "add_sub_pmg JIA:inst3\|lpm_add_sub:lpm_add_sub_component\|add_sub_pmg:auto_generated " "Info: Elaborating entity \"add_sub_pmg\" for hierarchy \"JIA:inst3\|lpm_add_sub:lpm_add_sub_component\|add_sub_pmg:auto_generated\"" {  } { { "lpm_add_sub.tdf" "auto_generated" { Text "d:/altera/quartus51/libraries/megafunctions/lpm_add_sub.tdf" 117 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "chuan chuan:inst2 " "Info: Elaborating entity \"chuan\" for hierarchy \"chuan:inst2\"" {  } { { "hanshu.bdf" "inst2" { Schematic "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/hanshu.bdf" { { 72 448 584 168 "inst2" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ADDER4B ADDER4B:inst11 " "Info: Elaborating entity \"ADDER4B\" for hierarchy \"ADDER4B:inst11\"" {  } { { "hanshu.bdf" "inst11" { Schematic "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/hanshu.bdf" { { 72 264 416 200 "inst11" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "r adder4b.vhd(19) " "Warning (10492): VHDL Process Statement warning at adder4b.vhd(19): signal \"r\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "adder4b.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/adder4b.vhd" 19 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "r adder4b.vhd(25) " "Warning (10492): VHDL Process Statement warning at adder4b.vhd(25): signal \"r\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "adder4b.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/adder4b.vhd" 25 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "S19 adder4b.vhd(28) " "Warning (10492): VHDL Process Statement warning at adder4b.vhd(28): signal \"S19\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "adder4b.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/adder4b.vhd" 28 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "S19 adder4b.vhd(29) " "Warning (10492): VHDL Process Statement warning at adder4b.vhd(29): signal \"S19\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "adder4b.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/adder4b.vhd" 29 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "M M:inst " "Info: Elaborating entity \"M\" for hierarchy \"M:inst\"" {  } { { "hanshu.bdf" "inst" { Schematic "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/hanshu.bdf" { { 272 184 280 400 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "shuchu2 shuchu2:inst17 " "Info: Elaborating entity \"shuchu2\" for hierarchy \"shuchu2:inst17\"" {  } { { "hanshu.bdf" "inst17" { Schematic "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/hanshu.bdf" { { 312 1416 1544 472 "inst17" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "shu shuchu2.vhd(20) " "Warning (10492): VHDL Process Statement warning at shuchu2.vhd(20): signal \"shu\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "shuchu2.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/shuchu2.vhd" 20 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "lpm_divide3.vhd 2 1 " "Warning: Using design file lpm_divide3.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 lpm_divide3-SYN " "Info: Found design unit 1: lpm_divide3-SYN" {  } { { "lpm_divide3.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/lpm_divide3.vhd" 50 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 lpm_divide3 " "Info: Found entity 1: lpm_divide3" {  } { { "lpm_divide3.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/lpm_divide3.vhd" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_divide3 lpm_divide3:inst22 " "Info: Elaborating entity \"lpm_divide3\" for hierarchy \"lpm_divide3:inst22\"" {  } { { "hanshu.bdf" "inst22" { Schematic "C:/Documents and Settings/Administrator/桌面/hanshuxinhaogai/hanshu.bdf" { { 712 992 1160 808 "inst22" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus51/libraries/megafunctions/lpm_divide.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus51/libraries/megafunctions/lpm_divide.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_divide " "Info: Found entity 1: lpm_divide" {  } { { "lpm_divide.tdf" "" { Text "d:/altera/quartus51/libraries/megafunctions/lpm_divide.tdf" 116 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}